AD9522-2 Datasheet, PDF (3/84 Pages) Analog Devices – 12 LVDS/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO

Reset Modes .................................................................................48
Power-On Reset.......................................................................48
Hardware Reset via the RESET Pin ......................................48
Soft Reset via the Serial Port..................................................48
Soft Reset to Settings in EEPROM When EEPROM Pin = 0
via the Serial Port ....................................................................48
Power-Down Modes ...................................................................48
Chip Power-Down via PD .....................................................48
PLL Power-Down....................................................................49
Distribution Power-Down .....................................................49
Individual Clock Output Power-Down................................49
Individual Clock Channel Power-Down .............................49
Serial Control Port ..........................................................................50
SPI/I2C Port Selection ................................................................50
I2C Serial Port Operation...........................................................50
I²C Bus Characteristics...........................................................50
Data Transfer Process .............................................................51
Data Transfer Format .............................................................52
I2C Serial Port Timing............................................................52
SPI Serial Port Operation...........................................................53
Pin Descriptions......................................................................53
SPI Mode Operation...............................................................53
Communication Cycle—Instruction Plus Data..................53
Write .........................................................................................53
Read ..........................................................................................53
SPI Instruction Word (16 Bits)..................................................54
SPI MSB/LSB First Transfers .....................................................54
REVISION HISTORY
11/08—Revision 0: Initial Version
AD9522-2
EEPROM Operations .....................................................................57
Writing to the EEPROM ............................................................57
Reading from the EEPROM ......................................................57
Programming the EEPROM Buffer Segment..........................58
Register Section Definition Group.......................................58
IO_UPDATE (Operational Code 0x80) ..............................58
End-of-Data (Operational Code 0xFF) ...............................58
Pseudo-End-of-Data (Operational Code 0xFE).................58
Thermal Performance.....................................................................60
Register Map ....................................................................................61
Register Map Descriptions.............................................................66
Applications Information...............................................................80
Frequency Planning Using the AD9522 ..................................80
Using the AD9522 Outputs for ADC Clock Applications ....80
LVDS Clock Distribution...........................................................80
CMOS Clock Distribution.........................................................81
Outline Dimensions........................................................................82
Ordering Guide ...........................................................................82
Rev. 0 | Page 3 of 84