AD9517-2_15 Datasheet, PDF (29/80 Pages) Analog Devices – 12-Output Clock Generator with Integrated 2.2 GHz VCO

Data Sheet
AD9517-2
REF_ SEL
VS GND
RSET
REFMON
REFIN (REF1)
REFIN (REF2)
BYPASS
LF
CLK
CLK
PD
SYNC
RESET
REF1
REF2
REFERENCE
SWITCHOVER
STATUS
STATUS
LOW DROPOUT
REGULATOR (LDO)
VCO
DIGITAL
LOGIC
DISTRIBUTION
REFERENCE
R
DIVIDER
VCO STATUS
P, P + 1
PRESCALER
A/B
COUNTERS
N DIVIDER
PROGRAMMABLE
R DELAY
PROGRAMMABLE
N DELAY
DIVIDE BY
2, 3, 4, 5, OR 6
10
DIVIDE BY
1 TO 32
CPRSET VCP
LOCK
DETECT
PHASE
FREQUENCY
DETECTOR
HOLD
CHARGE
PUMP
LVPECL
SCLK
SDIO
SDO
CS
SERIAL
CONTROL
PORT
DIVIDE BY
1 TO 32
DIVIDE BY
1 TO 32
DIVIDE BY
1 TO 32
LVPECL
∆T
LVDS/CMOS
∆T
LD
CP
STATUS
OUT0
OUT0
OUT1
OUT1
OUT2
OUT2
OUT3
OUT3
OUT4 (OUT4A)
OUT4 (OUT4B)
OUT5 (OUT5A)
OUT5 (OUT5B)
AD9517-2
DIVIDE BY
1 TO 32
DIVIDE BY
1 TO 32
OUT6 (OUT6A)
∆T
OUT6 (OUT6B)
LVDS/CMOS
OUT7 (OUT7A)
∆T
OUT7 (OUT7B)
Figure 43. High Frequency Clock Distribution or External VCO > 1600 MHz
Rev. E | Page 29 of 80