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ADE7169F16 Datasheet, PDF (28/140 Pages) Analog Devices – Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
ADE7169F16
(IPSME, 0xEC) enables this event to generate a PSM interrupt.
This event associated with the SAG monitoring can be used to
detect a power supply - VDD - being compromised and trigger
further actions prior to decide a switch of VDD to VBAT .
SAG Monitor PSM Interrupt
The ADE7169F16 energy measurement DSP monitors the ac
voltage input at the VP and VN input pins. The SAGLVL register
is used to set the threshold for a line voltage sag event. The
SAGF bit in the Power Management Interrupt Flag SFR (IPSMF,
0xF8) is set if the line voltage stays below the level set in the
SAGLVL register for the number of line cycles set in the
SAGCYC register, - see Line Voltage Sag Detection section.
Preliminary Technical Data
Setting the ESAG bit in the Power Management Interrupt
Enable SFR (IPSME, 0xEC) enables this event to generate a
PSM interrupt.
USING THE POWER SUPPLY FEATURES
In an energy meter application, VDD, the 3.3V power supply, is
typically generated from the ac line voltage and regulated to
3.3V by a voltage regulator IC. The pre-regulated DC voltage,
typically 5V to 12V, can be connected to VDCIN through a
resistor divider. A 3.6V battery can be connected to VBAT. Figure
11 shows how the ADE7169F16 power supply inputs would be
set up in this application.
(240, 220, 110V typical)
ac input
BCTRL
VP
VN
SAG
Detection
5 - 12V dc
VDCIN
PSU
3.3V
VDD
Regulator
VSWOUT
VBAT
Voltage
Supervisory
Voltage
Supervisory
Power Supply
Management
VSW
IPSMF SFR
(Addr. 0xF8)
Figure 11. Power Supply Management for Energy Meter Application
Figure 12 shows the sequence of events that will be generated
the power supply.
for the power meter application in Figure 11 if the main power
supply generated by the PSU starts to fail. The sag detection can
provide the earliest warning of a potential problem on VDD.
When a sag event occurs, the user code can be configured to
backup data and prepare for battery switchover if desired. The
Figure 13 shows the sequence of events that will be generated
for the power meter application shown in Figure 11 if the main
power supply starts to fail, with battery switchover on low VDCIN
or low VDD enabled.
relative spacing of these interrupts will depend on the design of
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