ADV7310 Datasheet, PDF (25/84 Pages) Analog Devices – Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs

SR7–
SR0
44h
Register
SD Mode
Register 3
45h Reserved
46h Reserved
47h SD Mode
Register 4
48h SD Mode
Register 5
49h SD Mode
Register 6
ADV7310/ADV7311
Bit Description
SD VSYNC-3H
SD RTC/TR/SCR
SD Active Video Length
SD Chroma
SD Burst
SD Color Bars
SD DAC Swap
Bit 7
0
1
Bit 6
0
1
Bit 5
0
1
Bit 4
0
1
Bit 3
0
1
Bit 2
0
0
1
1
Bit 1
0
1
0
1
Bit 0
0
1
Register Setting
Disabled
VSYNC = 2.5 lines [PAL]
VSYNC = 3 lines [NTSC]
Genlock disabled
Subcarrier Reset
Timing Reset
RTC enabled
720 pixels
710 [NTSC]/702[PAL]
Chroma enabled
Chroma disabled
Enabled
Disabled
Disabled
Enabled
DAC A = Luma, DAC B =
Chroma
DAC A = Chroma, DAC B =
Luma
SD PrPb Scale
SD Y Scale
SD Hue Adjust
SD Brightness
SD Luma SSAF Gain
Reserved
Reserved
Reserved
Reserved
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
Disabled
1
Enabled
0
0 must be written to this bit
0
0 must be written to this bit
0
0 must be written to this bit
0
Reserved
0
0 must be written to this bit
SD Double Buffering
0
Disabled
1
Enabled
SD Input Format
0
0
8-bit Input
0
1
16-bit Input
1
0
10-bit Input
1
1
20-bit Input
SD Digital Noise Reduction
0
Disabled
1
Enabled
SD Gamma Control
0
Disabled
1
Enabled
SD Gamma Curve
0
Gamma Curve A
1
Gamma Curve B
SD Undershoot Limiter
0
0
Disabled
0
1
– 11 IRE
1
0
– 6 IRE
1
1
– 1.5 IRE
Reserved
0
0 must be written to this bit
SD Black Burst Output on DAC
Luma
0
Disabled
1
Enabled
SD Chroma Delay
0
0
Disabled
0
1
4 clk cycles
1
0
8 clk cycles
1
1
Reserved
Reserved
0
0 must be written to this bit
Reserved
0
0 must be written to this bit
Reset
Values
00h
00h
00h
00h
00h
00h
REV. A
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