ADSP-2184_15 Datasheet, PDF (24/31 Pages) Analog Devices – DSP Microcomputer

ADSP-2184
TIMING PARAMETERS
Parameter
IDMA Read, Long Read Cycle
Timing Requirements:
t_IKR
IACK Low before Start of Read¹
t_IRK
End of Read after IACK Low
Switching Characteristics:
t_IKHR
t_IKDS
IACK High after Start of Read¹
IAD15–0 Data Setup before IACK Low
t_IKDH
IAD15–0 Data Hold after End of Read²
t_IKDD
IAD15–0 Data Disabled after End of Read²
t_IRDE
IAD15–0 Previous Data Enabled after Start of Read
t_IRDV
IAD15–0 Previous Data Valid after Start of Read
t_IRDH1
IAD15–0 Previous Data Hold after Start of Read (DM/PM1)³
t_IRDH2
IAD15–0 Previous Data Hold after Start of Read (PM2)⁴
NOTES
1_{Start of Read = IS Low and IRD Low.}
2_{End of Read = IS High or IRD High.}
3_{DM read or first half of PM read.}
4_{Second half of PM read.}
Min
0
2
0.5 t_CK – 10
0
0
2 t_CK – 5
t_CK – 5
IACK
IS
t_IKR
t_IKHR
IRD
IAD 15–0
t_IRK
t_IRDE
t_IKDS
t_IKDH
t_IRDV
PREVIOUS
DATA
t_IRDH
READ
DATA
t_IKDD
Figure 18. IDMA Read, Long Read Cycle
Max
15
10
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–24–
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