ADSP-21364 Datasheet, PDF (24/52 Pages) Analog Devices – SHARC Processor

ADSP-21364
Flags
The timing specifications provided below apply to the FLAG3–0
and DAI_P20–1 pins, the parallel port and the serial peripheral
interface (SPI). See Table 3, “Pin Descriptions,” on page 11 for
more information on flag use.
Table 19. Flags
Parameter
Timing Requirement
t_FIPW
FLAG3–0 IN Pulse Width
Switching Characteristic
t_FOPW
FLAG3–0 OUT Pulse Width
Preliminary Technical Data
Min
2 × t_PCLK + 3
Max
2 × t_PCLK – 1
Unit
ns
ns
DAI_P20-1
(FLAG3-0IN)
(AD15-0)
t_FIPW
DAI_P20-1
(FLAG3-0OUT)
(AD15-0)
t_FOPW
Figure 16. Flags
Rev. PrB | Page 24 of 52 | September 2004