ADT7467 Datasheet, PDF (23/80 Pages) Analog Devices – dBCool Remote Thermal Monitor and Fan Controller

The user can also set up the ADT7467 so that, when the
THERM pin is driven low externally, the fans run at 100%. The
fans run at 100% for the duration of the time that the THERM
pin is pulled low. This is done by setting the BOOST bit (Bit 2)
in Configuration Register 3 (Address = 0x78) to 1. This works
only if the fan is already running, for example, in manual mode
when the current duty cycle is above 0x00, or in automatic
mode when the temperature is above TMIN. If the temperature is
below TMIN or if the duty cycle in manual mode is set to 0x00,
then pulling the THERM low externally has no effect. See
Figure 30 for more information.
T_MIN
THERM
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100%, BECAUSE
TEMPERATURE IS BELOW T_MIN
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100%, BECAUSE
TEMPERATURE IS ABOVE T_MIN AND FANS
ARE ALREADY RUNNING
Figure 30. Asserting THERM Low as an Input
in Automatic Fan Speed Control Mode
THERM TIMER
The ADT7467 has an internal timer to measure THERM
assertion time. For example, the THERM input can be
connected to the PROCHOT output of a Pentium 4 CPU to
measure system performance. The THERM input can also be
connected to the output of a trip point temperature sensor.
The timer is started on the assertion of the ADT7467’s THERM
input and stopped when THERM is unasserted. The timer
counts THERM times cumulatively, that is, the timer resumes
counting on the next THERM assertion. The THERM timer
continues to accumulate THERM assertion times until the
timer is read (it is cleared on read) or until it reaches full scale.
If the counter reaches full scale, it stops at that reading until
cleared.
ADT7467
The 8-bit THERM timer register (Reg. 0x79) is designed such
that Bit 0 is set to 1 on the first THERM assertion. Once the
cumulative THERM assertion time has exceeded 45.52 ms, Bit 1
of the THERM timer is set and Bit 0 now becomes the LSB of
the timer with a resolution of 22.76 ms (see Figure 31).
When using the THERM timer, be aware of the following.
After a THERM timer read (Reg. 0x79):
1. The contents of the timer are cleared on read.
2. The F4P bit (Bit 5) of Status Register 2 needs to be cleared
(assuming that the THERM timer limit has been
exceeded).
If the THERM timer is read during a THERM assertion, then
the following happens:
1. The contents of the timer are cleared.
2. Bit 0 of the THERM timer is set to 1 (because a THERM
assertion is occurring).
3. The THERM timer increments from zero.
4. If the THERM timer limit (Reg. 0x7A) = 0x00, then the
F4P bit is set.
THERM
THERM 0 0 0 0 0 0 0 1
TIMER 7 6 5 4 3 2 1 0
(REG. 0x79)
THERM
THERM ASSERTED
≤ 22.76ms
ACCUMULATE THERM LOW
ASSERTION TIMES
THERM 0 0 0 0 0 0 1 0
TIMER 7 6 5 4 3 2 1 0
(REG. 0x79)
THERM ASSERTED
≥ 45.52ms
THERM
ACCUMULATE THERM LOW
ASSERTION TIMES
THERM 0 0 0 0 0 1 0 1
TIMER
7 6 5 4 3 2 1 0 _{THERM ASSERTED ≥ 113.8ms}
(REG. 0x79)
(91.04ms + 22.76ms)
Figure 31.Understanding the THERM Timer
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