ADSP-2185L Datasheet, PDF (23/31 Pages) Analog Devices – DSP Microcomputer

Parameter
Serial Ports
Timing Requirements:
t_SCK
SCLK Period
t_SCS
DR/TFS/RFS Setup before SCLK Low
t_SCH
DR/TFS/RFS Hold after SCLK Low
t_SCP
SCLK_IN Width
Switching Characteristics:
t_CC
t_SCDE
t_SCDV
t_RH
t_RD
t_SCDH
t_TDE
t_TDV
t_SCDD
t_RDV
CLKOUT High to SCLK_OUT
SCLK High to DT Enable
SCLK High to DT Valid
TFS/RFS_OUT Hold after SCLK High
TFS/RFS_OUT Delay from SCLK High
DT Hold after SCLK High
TFS (Alt) to DT Enable
TFS (Alt) to DT Valid
SCLK High to DT Disable
RFS (Multichannel, Frame Delay Zero) to DT Valid
Min
50
4
8
15
0.25t_CK
0
0
0
0
ADSP-2185L
Max
Unit
ns
ns
ns
ns
0.25t_CK + 10
ns
ns
15
ns
ns
15
ns
ns
ns
14
ns
15
ns
15
ns
CLKOUT
SCLK
DR
TFSIN
RFSIN
RFSOUT
TFS_OUT
DT
TFSOUT
ALTERNATE
FRAME MODE
RFSOUT
MULTICHANNEL MODE,
FRAME DELAY 0
(MFD = 0)
TFSIN
ALTERNATE
FRAME MODE
RFSIN
MULTICHANNEL MODE,
FRAME DELAY 0
(MFD = 0)
t_CC
t_CC
t_SCS t_SCH
t_SCK
t_SCP
t_SCP
t_RD
t_RH
t_SCDE
t_SCDV
t_TDE
t_TDV
t_RDV
t_TDE
t_TDV
t_RDV
t_SCDH
t_SCDD
Figure 24. Serial Ports
REV. A
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