AD5122A Datasheet, PDF (23/32 Pages) Analog Devices – The AD5122A/AD5142A are available in a compact, 16-lead, 3 mm × 3 mm LFCSP and a 16-lead TSSOP.

Data Sheet
±6 dB Increment and Decrement Instructions
Two programming instructions produce logarithmic taper
increment or decrement of the wiper position control by
an individual potentiometer or by a ganged potentiometer
arrangement where all RDAC register positions are changed
simultaneously. The +6 dB increment is activated by Command 6,
and the −6 dB decrement is activated by Command 7 (see Table 16).
For example, starting with the zero-scale position and executing
Command 6 ten times moves the wiper in 6 dB steps to the full-
scale position. When the wiper position is near the maximum
setting, the last 6 dB increment instruction causes the wiper to go
to the full-scale position (see Table 14).
Incrementing the wiper position by +6 dB essentially doubles
the RDAC register value, whereas decrementing the wiper
position by −6 dB halves the register value. Internally, the
AD5122A/AD5142A use shift registers to shift the bits left and
right to achieve a ±6 dB increment or decrement. These functions
are useful for various audio/video level adjustments, especially for
white LED brightness settings in which human visual responses
are more sensitive to large adjustments than to small adjustments.
Table 14. Detailed Left Shift and Right Shift Functions for
the ±6 dB Step Increment and Decrement
Left Shift (+6 dB/Step)
Right Shift (−6 dB/Step)
0000 0000
1111 1111
0000 0001
0111 1111
0000 0010
0011 1111
0000 0100
0001 1111
0000 1000
0000 1111
0001 0000
0000 0111
0010 0000
0000 0011
0100 0000
0000 0001
1000 0000
0000 0000
1111 1111
0000 0000
Burst Mode
By enabling the burst mode, multiple data bytes can be sent to
the part consecutively. After the command byte, the part
interprets the following consecutive bytes as data bytes for the
command.
A new command can be sent by generating a repeat start or by a
stop and start condition.
The burst mode is activated by setting Bit D3 of the control
register (see Table 18).
AD5122A/AD5142A
Reset
The AD5122A/AD5142A can be reset through software by
executing Command 14 (see Table 16) or through hardware on
the low pulse of the RESET pin. The reset command loads the
RDAC registers with the contents of the EEPROM and takes
approximately 30 µs. The EEPROM is preloaded to midscale at
the factory, and initial power-up is, accordingly, at midscale.
Tie RESET to VLOGIC if the RESET pin is not used.
Shutdown Mode
The AD5122A/AD5142A can be placed in shutdown mode by
executing the software shutdown command, Command 15 (see
Table 16), and setting the LSB (D0) to 1. This feature places the
RDAC in a zero power consumption state where the device
operates in potentiometer mode, Terminal A is open-circuited
and the wiper, Terminal W, is connected to Terminal B; however, a
finite wiper resistance of 40 Ω is present. When the device is
configured in linear gain setting mode, the resistor addressed,
RAW or RWB, is internally placed at high impedance. Table 15
shows the truth table depending on the device operating mode.
The contents of the RDAC register are unchanged by entering
shutdown mode. However, all commands listed in Table 16 are
supported while in shutdown mode. Execute Command 15 (see
Table 16) and set the LSB (D0) to 0 to exit shutdown mode.
Table 15. Truth Table for Shutdown Mode
Linear Gain Setting Mode
Potentiometer Mode
RAW
RWB
RAW
RWB
High impedance High impedance High impedance RBS
EEPROM OR RDAC REGISTER PROTECTION
The EEPROM and RDAC registers can be protected by disabling
any update to these registers. This can be done by using software or
by using hardware. If these registers are protected by software,
set Bit D0 and/or Bit D1 (see Table 18), which protects the RDAC
and EEPROM registers independently.
When RDAC is protected, the only operation allowed is to copy
the EEPROM into the RDAC register.
INDEP PIN
If the INDEP pin is pulled high at power-up, the part operates
in linear gain setting mode, loading each string resistor, RAWX and
RWBX, with the value stored into the EEPROM (see Table 17). If
the pin is pulled low, the part powers up in potentiometer mode.
The INDEP pin and the D2 bit are connected internally to a logic
OR gate; if one or both are set to 1, the part cannot operate in
potentiometer mode (see Table 18).
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