AD7856 Datasheet, PDF (19/32 Pages) Analog Devices – 5 V Single Supply, 8-Channel 14-Bit 285 kSPS Sampling ADC

A combination of hardware and software selection can also be
used to achieve the desired effect.
PMGT1
Bit
Table VI.␣ Power Management Options
PMGT0 SLEEP
Bit
Pin
Comment
0
0
0
Full Power-Down Between
Conversions (HW/SW)
0
0
1
Full Power-Up (HW/SW)
0
1
X
Normal Operation
(Independent of the SLEEP
Pin)
1
0
X
Full Power-Down (SW)
1
1
X
Partial Power-Down Between
Conversions
NOTE
HW = Hardware Selection; SW = Software Selection.
AD7856
POWER-UP TIMES
Using an External Reference
When the AD7856 is powered up, the part is powered up from
one of two conditions. First, when the power supplies are ini-
tially powered up and, secondly, when the part is powered up
from either a hardware or software power-down (see last section).
When AV_DD and DV_DD are powered up, the AD7856 should be
left idle for approximately 42 ms (6 MHz CLK) to allow for the
autocalibration if a 10 nF cap is placed on the CAL pin, (see
Calibration section). During power-up the functionality of the
SLEEP pin is disabled, i.e., the part will not power down until
the end of the calibration if SLEEP is tied logic low. The auto-
calibration on power-up can be disabled if the CAL pin is tied to
a logic high. If the autocalibration is disabled, then the user must
take into account the time required by the AD7856 to power-up
before a self-calibration is carried out. This power-up time is the
time taken for the AD7856 to power up when power is first
applied (300 µs) typ) or the time it takes the external reference
to settle to the 14-bit level–whichever is the longer.
4/6MHz OSCILLATOR
CURRENT, I = 12mA TYP
ANALOG
SUPPLY
+5V
10␮F 0.1␮F
MASTER CLOCK
INPUT
0.1␮F
100kHz PULSE GENERATOR
0V TO 2.5V
INPUT
AUTO POWER
DOWN AFTER
CONVERSION
0.1␮F
0.01␮F
0.01␮F
AUTO CAL ON
POWER-UP
AV_DD DV_DD
AIN(+)
CLKIN
AIN(–)
SCLK
C_REF1
C_REF2
CONVST
AD7856
SYNC
SLEEP
CAL
AGND
DOUT
DIN
DGND REF_IN/REF_OUT
CONVERSION
START INPUT
SERIAL CLOCK
INPUT
LOW POWER
␮C/␮P
SERIAL DATA OUTPUT
SERIAL DATA INPUT
INTERNAL
0.1␮F REFERENCE
OPTIONAL
REF-192 EXTERNAL
REFERENCE
Figure 21. Typical Low Power Circuit
REV. A
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