AD7875_15 Datasheet, PDF (18/28 Pages) Analog Devices – LC MOS Complete, 12-Bit, 100 kHz, Sampling ADCs

AD7870/AD7875/AD7876
0
INPUT FREQUENCIES
F1 = 9.05kHz
F2 = 9.55kHz
SAMPLING FREQUENCY = 100kHz
–30
T_A = 25°C
IMD
ALL TERMS = 90.06dB
SECOND ORDER TERMS = 92.73dB
–60
THIRD ORDER TERSM = 93.45dB
–90
–120
0
50
FREQUENCY (kHz)
Figure 20. IMD Plot
AC Linearity Plot
When a sine wave of specified frequency is applied to the VIN
input of the AD7870/AD7875 and several million samples are
taken, a histogram showing the frequency of occurrence of each
of the 4096 ADC codes can be generated. From this histogram
data it is possible to generate an ac integral linearity plot as
shown in Figure 21. This shows very good integral linearity
performance from the AD7870/AD7875 at an input frequency
of 25 kHz. The absence of large spikes in the plot shows good
differential linearity. Simplified versions of the formulae used
are outlined below.
INL
(i
)
=
⎡ V (i) −V (o)
⎢
⎢⎣^V
(
fs)
−V
(o)
×
⎤
4096 _⎥
⎥⎦
−
i
where:
INL(i) is the integral linearity at code i.
V(fs) and V(o) are the estimated full-scale and offset transitions.
V(i) is the estimated transition for the i^th code.
V(i), the estimated code transition point, is derived as follows:
V (i) = − A×Cos [π ×cum(i)]
N
where:
A is the peak signal amplitude.
N is the number of histogram samples.
∑ cum(i) = i V (n) occurrences.
n=0
0.5
INPUT FREQUENCY = 25kHz
SAMPLE FREQUENCY = 100kHz
T_A = 25°C
0.25
0
–0.25
–0.50
0
511 1023 1535 2047 2559 3071 3583 4095
CODE
Figure 21. AC INL Plot
Rev. C | Page 18 of 28