AD9991_15 Datasheet, PDF (17/60 Pages) Analog Devices – 10-Bit CCD Signal Processor with Precision Timing Generator

AD9991
Vertical Pattern Groups (VPAT)
The vertical pattern groups define the individual pulse patterns
for each V1–V6 output signal. Table V summarizes the registers
available for generating each of the 10 V-pattern groups. The start
polarity (VPOL) determines the starting polarity of the ver ti-
cal sequence, and can be programmed high or low for
each V1–V6 output. The first, second, and third toggle posi-
tion (VTOG1, VTOG2, VTOG3) are the pixel locations within
the line where the pulse transitions. A fourth toggle position
(VTOG4) is also available for V-Pattern Groups 8 and 9. All tog-
gle positions are 12-bit values, allowing their placement anywhere
in the horizontal line. A separate register, VPATSTART, specifies
the start position of the V-pattern group within the line (see the
Vertical Sequences section). The VPATLEN register designates
the total length of the V-pattern group, which will determine the
number of pixels between each of the pattern repetitions, when
repetitions are used (see the Vertical Sequences section).
The FREEZE and RESUME registers are used to temporarily
stop the operation of the V1–V6 outputs. At the pixel location
specified in the FREEZE register, the V1–V6 outputs will be
held static at their current dc state, high or low. The V1–V6
outputs are held until the pixel location specified by RESUME
register. Two sets of FREEZE/RESUME registers are pro-
vided, allowing the vertical outputs to be interrupted twice in
the same line. The FREEZE and RESUME positions are pro-
grammed in the V-pattern group registers, but are separately
enabled using the VMASK registers, which are described in the
Vertical Sequence section.
Register
VPOL
VTOG1
VTOG2
VTOG3
VTOG4
VPATLEN
FREEZE1
RESUME1
FREEZE2
RESUME2
Length
1b
12b
12b
12b
12b
12b
12b
12b
12b
12b
Table V. Vertical Pattern Group Registers
Range
Description
High/Low
0–4096 Pixel Location
0–4096 Pixel Location
0–4096 Pixel Location
0–4096 Pixel Location
0–4096 Pixels
0–4096 Pixel Location
0–4096 Pixel Location
0–4096 Pixel Location
0–4096 Pixel Location
Starting Polarity of Each V1–V6 Output
First Toggle Position within Line for Each V1–V6 Output
Second Toggle Position within Line for Each V1–V6 Output
Third Toggle Position within Line for Each V1–V6 Output
Fourth Toggle Position, only Available in V-Pattern Groups 8 and 9
Total Length of Each V-Pattern Group
Holds the V1–V6 Outputs at Their Current Levels (Static DC)
Resumes Operation of the V1–V6 Outputs to Finish Their Pattern
Holds the V1–V6 Outputs at Their Current Levels (Static DC)
Resumes Operation of the V1–V6 Outputs to Finish Their Pattern
START POSITION OF V-PATTERN GROUP IS PROGRAMMABLE IN V-SEQUENCE REGISTERS
HD
4
V1
1
2
3
V2
1
2
3
V6
1
2
3
PROGRAMMABLE SETTINGS FOR EACH V-PATTERN:
1. START POLARITY
2. FIRST TOGGLE POSITION
3. SECOND TOGGLE POSITION (THIRD TOGGLE POSITION ALSO AVAILABLE, FOURTH TOGGLE POSITION AVAILABLE FOR V-PATTERN GROUPS 8 AND 9)
4. TOTAL PATTERN LENGTH FOR ALL V1–V6 OUTPUTS
Figure 16. Vertical Pattern Group Programmability
REV. 0
–17–