AD9524BCPZ Datasheet, PDF (17/56 Pages) Analog Devices – Jitter Cleaner and Clock Generator with 6 Differential or 13 LVCMOS Outputs

Data Sheet
AD9524
INPUT/OUTPUT TERMINATION RECOMMENDATIONS
AD9524 0.1µF
LVDS
OUTPUT
100Ω
HIGH
IMPEDANCE
INPUT
DOWNSTREAM
DEVICE
0.1µF
Figure 15. AC-Coupled LVDS Output Driver
AD9524 0.1µF
HSTL
OUTPUT
100Ω
HIGH
IMPEDANCE ^DOWNSTREAM
INPUT
DEVICE
0.1µF
Figure 19. AC-Coupled HSTL Output Driver
AD9524
LVDS
OUTPUT
100Ω
HIGH
IMPEDANCE ^DOWNSTREAM
INPUT
DEVICE
Figure 16. DC-Coupled LVDS Output Driver
AD9524 0.1µF
LVPECL-
COMPATIBLE
OUTPUT
HIGH
100Ω
IMPEDANCE
INPUT
DOWNSTREAM
DEVICE
0.1µF
Figure 17. AC-Coupled LVPECL Output Driver
AD9524
LVPECL-
COMPATIBLE 100Ω
OUTPUT
HIGH
IMPEDANCE
INPUT
DOWNSTREAM
DEVICE
Figure 18. DC-Coupled LVPECL Output Driver
AD9524
HSTL
OUTPUT
100Ω
HIGH
IMPEDANCE ^DOWNSTREAM
INPUT
DEVICE
Figure 20. DC-Coupled HSTL Output Driver
0.1µF
AD9524
100Ω
(OPTIONAL¹)
0.1µF
SELF-BIASED
REF, VCXO,
ZERO DELAY
INPUTS
1_{RESISTOR VALUE DEPENDS UPON}
REQUIRED TERMINATION OF SOURCE.
Figure 21. REF, VCXO, and Zero Delay Input, Differential Mode (When In
CMOS Single-Ended Input Mode, the Unused Input Can Be Left Unconnected)
Rev. E | Page 17 of 56