ADUC841BSZ62-3 Datasheet, PDF (16/88 Pages) Analog Devices – MicroConverter® 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU

ADuC841/ADuC842/ADuC843
FUNCTIONAL DESCRIPTION
8052 INSTRUCTION SET
Table 4 documents the number of clock cycles required for each
instruction. Most instructions are executed in one or two clock
cycles, resulting in a 16 MIPS peak performance when operating
at PLLCON = 00H on the ADuC842/ADuC843. On the ADuC841,
20 MIPS peak performance is possible with a 20 MHz external
crystal.
Table 4. Instructions
Mnemonic
Description
Arithmetic
ADD A,Rn
Add register to A
ADD A,@Ri
Add indirect memory to A
ADD A,dir
Add direct byte to A
ADD A,#data
Add immediate to A
ADDC A,Rn
Add register to A with carry
ADDC A,@Ri
Add indirect memory to A with carry
ADDC A,dir
Add direct byte to A with carry
ADD A,#data
Add immediate to A with carry
SUBB A,Rn
Subtract register from A with borrow
SUBB A,@Ri
Subtract indirect memory from A with borrow
SUBB A,dir
Subtract direct from A with borrow
SUBB A,#data
Subtract immediate from A with borrow
INC A
Increment A
INC Rn
Increment register
INC @Ri
Increment indirect memory
INC dir
Increment direct byte
INC DPTR
Increment data pointer
DEC A
Decrement A
DEC Rn
Decrement register
DEC @Ri
Decrement indirect memory
DEC dir
Decrement direct byte
MUL AB
Multiply A by B
DIV AB
Divide A by B
DA A
Decimal adjust A
Logic
ANL A,Rn
AND register to A
ANL A,@Ri
AND indirect memory to A
ANL A,dir
AND direct byte to A
ANL A,#data
AND immediate to A
ANL dir,A
AND A to direct byte
ANL dir,#data
AND immediate data to direct byte
ORL A,Rn
OR register to A
ORL A,@Ri
OR indirect memory to A
ORL A,dir
OR direct byte to A
ORL A,#data
OR immediate to A
ORL dir,A
OR A to direct byte
ORL dir,#data
OR immediate data to direct byte
XRL A,Rn
Exclusive-OR register to A
XRL A,@Ri
Exclusive-OR indirect memory to A
XRL A,#data
Exclusive-OR immediate to A
XRL dir,A
Exclusive-OR A to direct byte
Rev. 0 | Page 16 of 88
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