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ADSP-21060LCW-133 Datasheet, PDF (16/48 Pages) Analog Devices – ADSP-21060 Industrial SHARC DSP Microcomputer Family
ADSP-21060C/ADSP-21060LC
POWER DISSIPATION ADSP-21060LC (3.3 V)
These specifications apply to the internal power portion of VDD only. See the Power Dissipation section of this data sheet for calcula-
tion of external supply current and total supply current. For a complete discussion of the code used to measure power dissipation,
see the technical note “SHARC Power Dissipation Measurements.”
Specifications are based on the following operating scenarios:
Operation
Instruction Type
Instruction Fetch
Core Memory Access
Internal Memory DMA
Peak Activity (IDDINPEAK)
Multifunction
Cache
2 per Cycle (DM and PM)
1 per Cycle
High Activity (IDDINHIGH)
Multifunction
Internal Memory
1 per Cycle (DM)
1 per 2 Cycles
Low Activity (IDDINLOW)
Single Function
Internal Memory
None
1 per 2 Cycles
To estimate power consumption for a specific application, use the following equation where % is the amount of time your program
spends in that state:
%PEAK × IDDINPEAK + %HIGH × IDDINHIGH + %LOW × IDDINLOW + %IDLE × IDDIDLE = power consumption
Parameter
Test Conditions
Max
Unit
IDDINPEAK
Supply Current (Internal)1
tCK = 30 ns, VDD = max
540
mA
tCK = 25 ns, VDD = max
600
mA
IDDINHIGH
Supply Current (Internal)2
tCK = 30 ns, VDD = max
425
mA
tCK = 25 ns, VDD = max
475
mA
IDDINLOW
Supply Current (Internal)2
tCK = 30 ns, VDD = max
250
mA
tCK = 25 ns, VDD = max
275
mA
IDDIDLE
Supply Current (Idle)3
VDD = max
180
mA
NOTES
1The test program used to measure IDDINPEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual internal
power measurements made using typical applications are less than specified.
2IDDINHIGH is a composite average based on a range of high activity code. IDDINLOW is a composite average based on a range of low activity code.
3Idle denotes ADSP-21060LC state during execution of IDLE instruction.
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REV. B