ADUCM322I Datasheet, PDF (15/23 Pages) Analog Devices – general-purpose timers

Data Sheet
ADuCM322i
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
11
A RESERVED RESERVED RESERVED RESERVED RESERVED DGND RESERVED RESERVED RESERVED RESERVED
IREF
B IOVDD1
RESET
P3.3/
PRTADDR3/
PLAI[15]
RESERVED
RESERVED
DGND
P1.0/SIN/ P1.1/SOUT/ ^P1.2/
RESERVED RESERVED ECLKIN/ PLACLK1/ PWM0/
PLAI[4] PLAI[5] ^PLAI[6]
C
IOGND1
P0.0/
SCLK0/
PLAI[0]
P2.3/BM
P2.2/ P2.0/IRQ2/
IRQ4/POR/ PWMTRIP/
CLKOUT/ PLACLK2/
PLAI[10] PLAI[8]
P1.3/
PWM1/
PLAI[7]
P1.4/
PWM2/
SCLK1/
PLAO[10]
P1.5/
PWM3/
MISO1/
PLAO[11]
P1.6/
PWM4/
MOSI1/
PLAO[12]
P1.7/IRQ1/
PWM5/
CS1/
PLAO[13]
P3.4/
PRTADDR4/
PLAO[26]
P0.2/
P0.1/
P3.2/
D MOSI0/ MISO0/ PRTADDR2/
PLAI[2] PLAI[1] PLAI[14]
P2.4/IRQ5/
ADCCONV/
PWM6/
PLAO[18]
DGND2
IOVDD2
P0.5/
P0.4/
P0.3/
E
SDA0/
SCL0/
PLAO[3] PLAO[2]
IRQ0/CS0/
PLACLK0/
PLAI[3]
P2.6/
P0.7/
F
IRQ7/
SDA1/
PLAO[20] PLAO[5]
P0.6/
SCL1/
PLAO[4]
ADuCM322i
TOP VIEW
(Not to Scale)
SWCLK SWDIO IOGND2
AVDD_
REG0
AVDD_
REG1
VREF_1V2
P2.7/
P3.1/
P3.0/
G
IRQ8/ PRTADDR1/ _PRTADDR0/
PLAO[21] PLAI[13]
PLAI[12]
AIN15/
P4.7
AIN13/
P4.5
AVDD4
P3.5/
H
MCK/
PLAO[27]
XTALO
MDIO
AIN14/
P4.6
AIN12/
P4.4
AGND4
J IOVDD3
XTALI
VDAC7/
P5.2
VDAC4 AGND1
AIN0
AIN1
AIN2
AIN7
AIN10
AIN11/
BUF_
VREF2V5
K IOGND3
DVDD_
2V5
VDAC6/
P5.1
VDAC3/
P5.0
VDAC1
VDD1
AGND2
AIN3
AIN6
AIN9/
P4.3
ADC_
REFP
L
DGND1 DVDD_1V8
VDAC5
VDAC2/
P3.7/
PLAO[29]
VDAC0/
P5.3
AVDD3
AGND3
AIN4
AIN5
AIN8/
P4.2
ADC_
REFN
DIGITAL PINS
ANALOG PINS
Figure 8. Pin Configuration
Table 10. Pin Function Descriptions
Pin No. Mnemonic
A1
RESERVED
A2
RESERVED
A3
RESERVED
A4
RESERVED
A5
RESERVED
A6
DGND
A7
RESERVED
A8
RESERVED
A9
RESERVED
A10
RESERVED
A11
IREF
B1
IOVDD1
B2
RESET
B3
P3.3/PRTADDR3/PLAI[15]
B4
RESERVED
B5
RESERVED
B6
DGND
Type¹
RES
RES
RES1
RES1
RES
S
RES
RES1
RES1
RES
AI
S
I
I/O
RES
RES
S
Description
No Connect. Leave this ball unconnected.
Connect to AGND.
Connect to AVDD_REG1.
Connect to AVDD_REG1.
Connect to AGND.
Power Supply Ground.
Connect to AGND.
Connect to AVDD_REG1.
Connect to AVDD_REG1.
Connect to AGND.
Reference Current. This ball generates the reference current and is set by an
external resistor, REXT. Connect a 3.3 kΩ REXT from IREF to DGND.
3.3 V GPIO Supply.
Reset Input (Active Low). An internal pull-up resistor is included.
Digital Input/Output Port 3.3 (P3.3).
MDIO Port Address Bit 3 (PRTADDR3). See the Digital Inputs parameter in
Table 1 for details.
Output of PLA Element 15 (PLAI[15]).
No Connect. Leave this ball unconnected.
No Connect. Leave this ball unconnected.
Power Supply Ground.
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