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ADA4898-1 Datasheet, PDF (15/16 Pages) Analog Devices – High Voltage, Low Noise, Low Distortion, Unity Gain Stable, High Speed Op Amp
NOISE
To analyze the noise performance of an amplifier circuit,
identify the noise sources, and then determine if each source
has a significant contribution to the overall noise performance
of the amplifier. To simplify the noise calculations, noise spectral
densities were used rather than actual voltages to leave bandwidth
out of the expressions (noise spectral density, which is generally
expressed in nV/√Hz, is equivalent to the noise in a 1 Hz
bandwidth).
The noise model shown in Figure 44 has six individual noise
sources: the Johnson noise of the three resistors, the op amp
voltage noise, and the current noise in each input of the amplifier.
Each noise source has its own contribution to the noise at the
output. Noise is generally specified referred to input (RTI), but
it is often simpler to calculate the noise referred to the output
(RTO) and then divide by the noise gain to obtain the RTI noise.
B VN, R1
R1
4kTR1
A VN, R3
R3
4kTR3
VN, R2
R2
4kTR2
IN–
VN
GAIN FROM
A TO OUTPUT
=
NOISE GAIN =
NG = 1 + R2
R1
VOUT
IN+
GAIN FROM
B TO OUTPUT
= – R2
R1
RTI NOISE =
VN2 + 4kTR3 + 4kTR1
R2
R1 + R2
2
+IN+2R32 + IN–2
R1 × R2
R1 + R2
2
+ 4kTR2
R1
R1 + R2
2
RTO NOISE = NG × RTI NOISE
Figure 44. Op Amp Noise Analysis Model
All resistors have a Johnson noise that is calculated by
(4kBTR) .
where:
k is Boltzmann’s Constant (1.38 × 10−23 J/K).
B is the bandwidth in Hertz.
T is the absolute temperature in Kelvin.
R is the resistance in ohms.
A simple relationship that is easy to remember is that a 50 Ω
resistor generates a Johnson noise of 1 nV/√Hz at 25°C.
In applications where noise sensitivity is critical, care must be
taken not to introduce other significant noise sources to the
amplifier. Each resistor is a noise source. Attention to the
following areas is critical to maintain low noise performance:
design, layout, and component selection. A summary of noise
performance for the amplifier and associated resistors can be
seen in Table 6.
ADA4898-1
CIRCUIT CONSIDERATIONS
Careful and deliberate attention to detail when laying out the
ADA4898-1 board yields optimal performance. Power supply
bypassing, parasitic capacitance, and component selection all
contribute to the overall performance of the amplifier.
PCB LAYOUT
Because the ADA4898-1 can operate up to 65 MHz, it is
essential that RF board layout techniques be employed. All
ground and power planes under the pins of the ADA4898-1
should be cleared of copper to prevent the formation of parasitic
capacitance between the input pins to ground and the output pins
to ground. A single mounting pad on a SOIC footprint can add
as much as 0.2 pF of capacitance to ground if the ground plane
is not cleared from under the mounting pads.
POWER SUPPLY BYPASSING
Power supply bypassing for the ADA4898-1 has been optimized
for frequency response and distortion performance. Figure 42
shows the recommended values and location of the bypass
capacitors. Power supply bypassing is critical for stability,
frequency response, distortion, and PSR performance. The
0.1 μF capacitors shown in Figure 42 should be as close to the
supply pins of the ADA4898-1 as possible. The 10 μF electrolytic
capacitors should be adjacent to but not necessary close to the
0.1 μF capacitors. The capacitor between the two supplies helps
improve PSR and distortion performance. In some cases, additional
paralleled capacitors can help improve frequency and transient
response.
GROUNDING
Ground and power planes should be used where possible. Ground
and power planes reduce the resistance and inductance of the
power planes and ground returns. The returns for the input
and output terminations, bypass capacitors, and RG should all
be kept as close to the ADA4898-1 as possible. The output load
ground and the bypass capacitor grounds should be returned to
the same point on the ground plane to minimize parasitic trace
inductance, ringing, and overshoot and to improve distortion
performance.
The ADA4898-1 package features an exposed paddle. For
optimum electrical and thermal performance, solder this paddle to
ground. For more information on high speed circuit design, see
A Practical Guide to High-Speed Printed-Circuit-Board Layout at
www.analog.com.
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