OP249_07 Datasheet, PDF (14/20 Pages) Analog Devices – Dual, Precision JFET High Speed Operational Amplifier

OP249
100
90
10
0%
50mV
1µs
Figure 42. Small-Signal Transient Response,
AV = 1, ZL = 2 kΩ||100 pF, No Compensation, VS = ±15 V
As with most JFET input amplifiers, the output of the OP249
can undergo phase inversion if either input exceeds the specified
input voltage range. Phase inversion does not damage the
amplifier, nor does it cause an internal latch-up condition.
Supply decoupling should be used to overcome inductance and
resistance associated with supply lines to the amplifier. A 0.1 μF
and a 10 μF capacitor should be placed between each supply pin
and ground.
OPEN-LOOP GAIN LINEARITY
The OP249 has both an extremely high open-loop gain of
1 kV/mV minimum and constant gain linearity, which enhances its
dc precision and provides superb accuracy in high closed-loop
gain applications. Figure 43 illustrates the typical open-loop
gain linearity—high gain accuracy is assured, even when
driving a 600 Ω load.
OFFSET VOLTAGE ADJUSTMENT
The inherent low offset voltage of the OP249 makes offset
adjustments unnecessary in most applications. However, where
a lower offset error is required, balancing can be performed
with simple external circuitry, as shown in Figure 44 and Figure 45.
VERTICAL 50µV/DIV
INPUT VARIATION
R4
+V
R3
V_IN
R5
50kΩ
R1
200kΩ
R2
31Ω
1/2
OP249
V_OUT
V_OS ADJUST RANGE = ±V
R2
R1
–V
Figure 44. Offset Adjustment for Inverting Amplifier Configuration
+V
R3
50kΩ
R1
200kΩ
R4
R2
33Ω
R5
1/2
OP249
V_OUT
–V
V_IN
V_OS ADJUST RANGE = ±V
R2
R1
GAIN =
V_OUT
V_IN
=1+
R5
R4 + R2
=1+
R5
R4
IF R2 << R4
Figure 45. Offset Adjustment for Noninverting Amplifier Configuration
In Figure 44, the offset adjustment is made by supplying a small
voltage at the noninverting input of the amplifier. Resistors R1
and R2 attenuate the potentiometer voltage, providing a ±2.5 mV
(with VS = ±15 V) adjustment range, referred to the input.
Figure 45 shows the offset adjustment for the noninverting
amplifier configuration, also providing a ±2.5 mV adjustment
range. As shown in the equations in Figure 45, if R4 is not much
greater than R2, a resulting closed-loop gain error must be
accounted for.
SETTLING TIME
The settling time is the time between when the input signal begins
to change and when the output permanently enters a prescribed
error band. The error bands on the output are 5 mV and 0.5 mV,
respectively, for 0.1% and 0.01% accuracy.
Figure 46 shows the settling time of the OP249, which is typically
870 ns. Moreover, problems in settling response, such as thermal
tails and long-term ringing, are nonexistent.
870ns
100
90
HORIZONTAL 5V/DIV
OUTPUT CHARGE
Figure 43. Open-Loop Gain Linearity; Variation in Open-Loop Gain Results in
Errors in High Closed-Loop Gain Circuits; RL = 600 Ω, VS = ±15 V
10
0%
10mV
500ns
Figure 46. Settling Characteristics of the OP249 to 0.01%
Rev. F | Page 14 of 20