OP282_04 Datasheet, PDF (13/16 Pages) Analog Devices – Dual/Quad Low Power, High Speed JFET Operational Amplifiers

PROGRAMMABLE STATE-VARIABLE FILTER
The circuit shown in Figure 46 can be used to accurately
program the Q, the cutoff frequency fC, and gain of a 2-pole
state variable filter. OP482s have been used in this design
because of their high bandwidths, low power, and low noise.
This circuit takes only three packages to build because of the
quad configuration of the op amps and DACs.
The DACs shown are used in the voltage mode; therefore, many
values are dependent on the accuracy of the DAC only and not
on the absolute values of the DAC’s resistive ladders. This makes
this circuit unusually accurate for a programmable filter.
Adjusting DAC 1 changes the signal amplitude across R1;
therefore, the DAC attenuation times R1 determines the amount
of signal current that charges the integrating capacitor, C1. This
cutoff frequency can now be expressed as
OP282/OP482
fc
=
1
2πR1C1
⎜⎛
⎝
D1
256
⎟⎞
⎠
where D1 is the digital code for the DAC.
The gain of this circuit is set by adjusting D3. The gain equation is
Gain
=
R4
R5
⎜⎛
⎝
D3
256
⎟⎞
⎠
DAC 2 is used to set the Q of the circuit. Adjusting this DAC
controls the amount of feedback from the band-pass node to
the input summing node. Note that the digital value of the
DAC is in the numerator; therefore, zero code is not a valid
operating point.
Q
=
R2
R3
⎜⎛
⎝
256
D2
⎟⎞
⎠
V_IN
1/4
DAC8408
R4
2kΩ
R5
1/4
2kΩ
OP482
1/4
OP482
1/4
DAC8408
HIGH PASS
R7
2kΩ
1/4
OP482
C1
1000pF
R1
2kΩ
1/4
OP482
1/4
DAC8408
1/4
OP482
C1
1000pF
R1
2kΩ
1/4
OP482
LOW
PASS
R6
2kΩ
BAND PASS
R3
2kΩ
R2
2kΩ
1/4
OP482
1/4
OP482
1/4
DAC8408
Figure 46.
Rev. F | Page 13 of 16