AD9255BCPZRL7-80 Datasheet, PDF (12/44 Pages) Analog Devices – 14-Bit, 125 MSPS/105 MSPS/80 MSPS

AD9255
Pin No.
Mnemonic
22
D9
23
D10
24
D11
25
D12
26
D13 (MSB)
27
OR
8
DCO
SPI Control
31
SCLK/DFS
30
SDIO/DCS
32
CSB
ADC Configuration
6
OEB
35
DITHER
41
LVDS_RS
44
LVDS
48
PDWN
Data Sheet
Type
Output
Output
Output
Output
Output
Output
Output
Description
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
Overrange Output.
Data Clock Output.
Input
Input/output
Input
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.
SPI Chip Select (Active Low).
Input
Input
Input
Input
Input
Output Enable Input (Active Low).
In external pin mode, this pin sets dither to on (active high). Pull low for control via
SPI in SPI mode.
In external pin mode, this pin sets LVDS reduced swing output mode (active high).
Pull low for control via SPI in SPI mode.
In external pin mode, this pin sets LVDS output mode (active high). Pull low for
control via SPI in SPI mode.
Power-down input in external pin mode. In SPI mode, this input can be configured
as power-down or standby.
Rev. C | Page 12 of 44