AD5334BRUZ Datasheet, PDF (12/20 Pages) Analog Devices – 2.5 V to 5.5 V, 500 mu
A, Parallel Interface

AD5334/AD5335/AD5336/AD5344
0.2
0.1 ^{TA = 25؇C}
V_REF = 2V
0
GAIN ERROR
–0.1
–0.2
–0.3
–0.4
OFFSET ERROR
–0.5
–0.6
0
1
2
3
4
5
6
V_DD – Volts
Figure 14. Offset Error and Gain
Error vs. V_DD
5
5V SOURCE
4
3V SOURCE
3
2
1
3V SINK
5V SINK
0
0
1
2
3
4
5
6
SINK/SOURCE CURRENT – mA
Figure 15. V_OUT Source and Sink
Current Capability
600
T_A = 25؇C
500
400
300
200
100
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
V_DD – V
Figure 17. Supply Current vs. Supply
Voltage
0.5
T_A = 25؇C
0.4
0.3
0.2
0.1
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
V_DD – V
Figure 18. Power-Down Current vs.
Supply Voltage
600
500
400
300
200
100
0
ZERO-SCALE
V_DD = 5.5V
V_DD = 3.6V
T_A = 25؇C
V_REF = 2V
DAC CODE
FULL SCALE
Figure 16. Supply Current
vs. DAC Code
1800
1600
1400
1200
1000
800
600
V_DD = 5V
400
V_DD = 3V
200
0
0
1
2
3
4
5
V_LOGIC – V
Figure 19. Supply Current
vs. Logic Input Voltage
CH1
T_A = 25؇µCs
V_DD = 5V
V_REF = 5V
V_OUTA
CH2
LDAC
CH1
T_A = 25؇C
V_DD = 5V
V_REF = 2V
V_DD
CH2
V_OUTA
CH1 1V, CH2 5V, TIME BASE= 1␮s/DIV
Figure 20. Half-Scale Settling (1/4 to
3/4 Scale Code Change)
CH1 2V, CH2 200mV, TIME BASE = 200␮s/DIV
Figure 21. Power-On Reset to 0 V
T_A = 25؇C
V_DD = 5V
V_REF = 2V
CH1
V_OUTA
PD
CH2
CH1 500mV, CH2 5V, TIME BASE = 1␮s/DIV
Figure 22. Exiting Power-Down
to Midscale
–12–
REV. 0