EVAL-AD7764_15 Datasheet, PDF (10/23 Pages) Analog Devices – Evaluation Board for AD7764/AD7765 using

EVAL-AD7764/AD7765EDZ
7. For the initial operation of the AD7764 and AD7765 versions
of the evaluation board, set the Decimation Rate to 64 or
128 respectively in the front panel of the AD7764_5
Evaluation Software dialog box. These are the default
decimation rate of the AD7764/
AD7765 parts on reset and power-up of the evaluation board.
8. As well as offering the user different decimation rates the front
panel software also allows the user to select the MCLK
frequency being applied to the AD7764/5 device. Options
include 40MHz, 30MHz, 25MHz, and 20MHz. After selecting
any of these MCLK frequencies, please monitor the MCLK
test point on the evaluation board to ensure the MCLK has
changed in accordance with what you have selected on the
front panel GUI before pressing the Sample or Continuous
buttons to acquire samples.
9. To show samples output by the EVAL-AD7764/5/EDZ
evaluation board Click Sample or Continuous. Clicking
Sample gives one set of samples, the length of which is
determined by the Number of Samples selection on the
software front panel. Clicking Continuous shows
continuously updated samples of the analog input to the
device.
Figure 12. Sample and Continuous Front Panel Buttons
10. It is important to ensure that the frequency of the FSO
pulse on an oscilloscope (at the test-point marked FSO) is
checked so that it matches the frequency shown in the
Frequency text box on the software front panel.
11. If at any stage these do not match, reset the AD7764/AD7765/
evaluation board by pressing the RESET push button on the
Preliminary Technical Data
evaluation board or using the RESET button on the
software front panel. Then set the decimation rate on the
software front panel to the correct default value.
12. The AD7764/5 software front panel also shows the status
bits corresponding to the final sample in the batch of
samples shown on the screen. The status indicator- marked
“ADC Status Bits” correspond to the final 8 bits output in
each conversion result, and indicate the power mode, over
voltage inputs and Filter Settle information.
13. The AD7764/5 software also allows the user to program
the Overrange and Gain correction registers. The write
functions for these registers are located in the top right
hand corner of the GUI. The default Gain of the AD7764/5
is set to 1.25. Changing this value allows the user to
digitally alter the gain of the conversion result, as it is
output from the AD7764/5 device.
14. Programming the Overrange register allow the user to set a
threshold whereby any signal sampled which passes this
threshold will set off a flag on the overrange bit and
overrange register bit as detailed in the AD7764/5
datasheets.
15. Both of these registers can be read to verify the value
written to the ADC. The Read function and indicator for
each register are located directly below the write functions.
SOURCE FPGA AND LABVIEW CODE
The FPGA source code for the EVAL-AD7764/5EDZ system is
available from the AD7764 and AD7765 product pages by
clicking on the Evaluation tools link. This FPGA code can be
used as example code for users wishing to build their own
interface to the AD7764/5 devices. The source Labview code for
the evaluation software is also available to users wishing to
incorporate the AD7764/5 conversion outputs as acquired by
the CED board into their own Labview analysis routines. Again,
see the AD7764/5 product pages at www.analog.com for
download.
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