CN0337 Datasheet, PDF (1/8 Pages) Analog Devices – EVALUATION AND DESIGN SUPPORT

Circuit Note
CN-0337
Circuits from the Lab® reference designs are engineered and
tested for quick and easy system integration to help solve today’s
analog, mixed-signal, and RF design challenges. For more
information and/or support, visit www.analog.com/CN0337.
Devices Connected/Referenced
AD8608
Precision, Low Noise, CMOS, Rail to Rail
Input/Output Quad Op Amp
AD7091R
1 MSPS, Ultralow Power, 12-Bit ADC
ADuM5401
4-Channel, 2.5 kV Isolators with
Integrated DC-to-DC Converter
12-Bit, 300 kSPS, Single-Supply, Fully Isolated RTD Temperature Measurement
System with 3-Wire Compensation
EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
CN0337 Circuit Evaluation Board (EVAL-CN0337-PMDZ)
SDP/PMD Interposer Board (SDP-PMD-IB1Z)
System Demonstration Platform (EVAL-SDP-CB1Z)
Design and Integration Files
Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
The circuit shown in Figure 1 is a completely isolated 12-bit,
300 kSPS RTD temperature measuring system that uses only
three active devices. The system processes the output of a Pt100
RTD and includes an innovative circuit for lead-wire
compensation using a standard 3-wire connection. The circuit
operates on a single 3.3 V supply. The total error after room
temperature calibration is less than ±0.24% FSR for a ±10°C
change in temperature, making it ideal for a wide variety of
industrial temperature measurements.
The small footprint of the circuit makes this combination an
industry-leading solution for temperature measurements where
accuracy, cost, and size play a critical role. Both data and power
are isolated, thereby making the circuit robust to high voltages
and also ground-loop interference often encountered in harsh
industrial environments.
The novel circuit for 3-wire RTD lead wire compensation was
developed by Hristo Ivanov Gigov, Associate Professor and PhD,
and Stanimir Krasimirov Stankov, Engineer and PhD Student,
Department of Electronic Engineering and Microelectronics,
Technical University of Varna, Varna, Bulgaria.
A
J2
RTD LINE INPUT
(Pt100)
R10
1
r₁
1
1kΩ
R_X = R₀ + ΔR ₂
2
r₂
3
r₃
3B
0ºC TO 300°C
U1D
1/4
AD8608
100Ω TO 212.05Ω
U1C
1/4
AD8608
R5
VREF
2kΩ
V_R
R8
VREF
+3.3V
26.7kΩ
C10
0.1µF
U1A
1/4
AD8608
R1
100Ω
R1′
R2
1.91kΩ
R9
1.1kΩ
R6′
R6 R12
2kΩ 39.2kΩ
GND_ISO
C11
U1B
1/4
AD8608
TP1
0.1V TO 2.4V
R11
VIN
51Ω
C9
4.7nF
GND_ISO
+3.3V
+3.3V
ADuM5401
(C-GRADE)
U3
AD7091R
CS
SCLK
CONVST
SDO
V_DRIVE
C12 _+3.3V
1µF
V_ISO
GND_ISO
V_OA
V_OB
V_OC
V_ID
V_SEL
GND_ISO
V_DD1
GND₁
V_IA
V_IB
V_IC
V_OD
RC_OUT
GND₁
ISOLATION
GND_ISO
R3
0.1µF
R4
GND_ISO
GND_ISO
1kΩ
R1′ = R1ǁR2
R6′ = R6ǁR12
39.2kΩ
Figure 1. Resistance Deviation to Digital Conversion with Isolation Using Pt100 RTD Sensor
(All Connections and Decoupling Not Shown)
J1
PMOD CON
12-PIN
+3.3V_IN
GND
SS
SCK
CONVST
MISO
GND
Rev. 0
Circuits from the Lab® reference designs from Analog Devices have been designedand built by Analog
Devices engineers. Standard engineering practices have been employed in the design and
construction of each circuit, and their function and performance have been tested and verified in a lab
environment at room temperature. However, you are solely responsible for testing the circuit and
determining its suitability and applicability for your use and application. Accordingly, in no event shall
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