CN-0046 Datasheet, PDF (1/3 Pages) Analog Devices – Using the AD8352 as an Ultralow Distortion Differential RF/IF Front End for High Speed ADCs

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Circuit Note
CN-0046
Devices Connected/Referenced
AD8352
Ultralow Distortion Differential
RF/IF Amplifier
AD9445
14-Bit, 105 MSPS/125 MSPS Analog-to-
Digital Converter
Using the AD8352 as an Ultralow Distortion Differential RF/IF Front End
for High Speed ADCs
CIRCUIT FUNCTION AND BENEFITS
These circuits provide both a single-ended and a differential
configuration for driving high speed ADCs using the AD8352
ultralow distortion differential RF/IF amplifier. The AD8352
provides the gain, isolation, and distortion performance
necessary for efficiently driving high linearity converters, such
as the AD9445. This device also provides balanced outputs
whether driven differentially or single-ended, thereby
maintaining excellent second-order distortion levels.
CIRCUIT DESCRIPTION
Figure 1 and Figure 2 illustrate two front-end circuits for
driving the AD9445 14-bit ADC at 105 MSPS. Figure 1
provides a differential input configuration, while Figure 2
provides a single-ended input configuration.
In the differential configuration shown in Figure 1, the input
49.9 Ω resistor provides a differential input impedance to the
50 Ω RF/IF source. When the driver is located less than
approximately one eighth of the wavelength of the maximum
input RF/IF frequency from the AD8352, impedance matching
is not required, thereby eliminating the need for this
termination resistor. The output 24 Ω series resistors provide
isolation from the input capacitance of the ADC, and the
optimum value is determined empirically. The 100 MHz FFT
plots shown in Figure 3 and Figure 4 display the performance
results for the differential configuration.
In the single-ended input configuration shown in Figure 2, the
net input impedance at VIP is RN (200 Ω) plus the external
24.9 Ω balancing resistor, or ~225 Ω. This requires a 64.9 Ω
parallel resistor to provide the input impedance match for a 50 Ω
source. If input reflections are minimal, this impedance match is
not required. The 200 Ω resistor (RN) is required to balance the
output voltages to minimize second-order distortion.
The single-ended configuration provides −3 dB bandwidths
similar to input differential drive and shows little or no
degradation in overall third-order harmonic performance. The
single-ended, third-order distortion levels are similar to the
5V
50Ω SOURCE
IF/RF INPUT
0.1µF
16
1
2
49.9Ω
MINICIRCUITS
C_D ^RD
R_G
3
ADT1-1WT
4
5
0.1µF
0.1µF
8, 13
11
0.1µF _24Ω
AD8352
AD9445
10 _0.1µF 24Ω
6, 7, 9, 12
14
0.1µF
Figure 1. Differential Input to the AD8352 Driving the AD9445 14-Bit, 105 MSPS/125 MSPS ADC
(Simplified Schematic, All Connections Not Shown)
Rev. A
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