ADUC7121 Datasheet, PDF (1/96 Pages) Analog Devices – Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU

Precision Analog Microcontroller, 12-Bit
Analog I/O, ARM7TDMI MCU
ADuC7121
FEATURES
Software-triggered in-circuit reprogrammability
Analog input/output
9-channel, 12-bit, 1 MSPS ADC
2 differential pairs with input PGA
7 general-purpose inputs (differential or single-ended)
Fully differential and single-ended modes
0 V to VREF analog input range
5 low noise current digital-to-analog converters (IDACs)
250 mA, 200 mA, 80 mA, 45 mA, 20 mA
4 × 12-bit voltage output DACs
On-chip voltage reference
On-chip temperature sensor
Microcontroller
ARM7TDMI core, 16-bit/32-bit RISC architecture
JTAG port supports code download and debug
Clocking options
Trimmed on-chip oscillator (±3%)
External watch crystal
External clock source up to 41.78 MHz
On-chip peripherals
UART, 2 × I²C and SPI serial I/O
32-pin GPIO port
4× general-purpose timers
Wake-up and watchdog timers (WDT)
Power supply monitor
Vectored interrupt controller for FIQ and IRQ
8 priority levels for each interrupt type
Interrupt on edge or level external pin inputs
Power
Specified for 3 V operation
Active mode: 11 mA at 5 MHz, 40 mA at 41.78 MHz
Packages and temperature range
7 mm × 7 mm 108-ball CSP_BGA
Fully specified for –10°C to +95°C operation
Tools
Low cost QuickStart development system
Full third party support
41.78 MHz PLL with programmable divider
Memory
126 kB flash/EE memory, 8 kB SRAM
APPLICATIONS
Optical modules—tunable laser
In-circuit download, JTAG-based debug
FUNCTIONAL BLOCK DIAGRAM
AVDD 3.3V AGND
DAC0 DAC1 DAC2 DAC3
IDAC0 IDAC1 IDAC2 IDAC3 IDAC4
PADC0N
PADC0P
PADC1N
PADC1P
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
ADC10/AINCM
PGA
PGA
TEMPERATURE
SENSOR
ADuC7121
1MSPS
12-BIT
SAR ADC
OSC
WAKE-UP
TIMER
WD
TIMER
VIC
PLA
PLL
POR
PWM
3× GP 8kB SRAM
TIMERS (2k × 32-BIT) _LDO
126kB
FLASH
(63k ×
16-BIT)
ARM7
TDMI
UART
JTAG
GPIO
CONTROL
SPI
I²C × 2
INTERNAL
REFERENCE
BUF
V_REF_1.2 V_REF_2.5
P0.0 TO P0.7
P1.0 TO P1.7
Figure 1.
P2.0 TO P2.7
P3.0 TO P3.7
IOVDD
IOGND
XTALI
XTALO
RST
TDO
TDI
TCK
TMS
TRST
Rev. 0
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