ADSP-BF532_15 Datasheet, PDF (1/64 Pages) Analog Devices – Blackfin Embedded Processor

Blackfin
Embedded Processor
ADSP-BF531/ADSP-BF532/ADSP-BF533
FEATURES
Up to 600 MHz high performance Blackfin processor
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,
40-bit shifter
RISC-like register and instruction model for ease of pro-
gramming and compiler-friendly support
Advanced debug, trace, and performance monitoring
Wide range of operating voltages (see Operating Conditions
on Page 20)
Qualified for Automotive Applications (see Automotive Prod-
ucts on Page 62)
Programmable on-chip voltage regulator
160-ball CSP_BGA, 169-ball PBGA, and 176-lead LQFP
packages
MEMORY
Up to 148K bytes of on-chip memory (see Table 1 on Page 3)
Memory management unit providing memory protection
External memory controller with glueless support for
SDRAM, SRAM, flash, and ROM
Flexible memory booting options from SPI and
external memory
PERIPHERALS
Parallel peripheral interface PPI, supporting
ITU-R 656 video data formats
2 dual-channel, full duplex synchronous serial ports, sup-
porting eight stereo I²S channels
2 memory-to-memory DMAs
8 peripheral DMAs
SPI-compatible port
Three 32-bit timer/counters with PWM support
Real-time clock and watchdog timer
32-bit core timer
Up to 16 general-purpose I/O pins (GPIO)
UART with support for IrDA
Event handler
Debug/JTAG interface
On-chip PLL capable of frequency multiplication
VOLTAGE REGULATOR
JTAG TEST AND EMULATION
B
INTERRUPT
CONTROLLER
L1
INSTRUCTION
MEMORY
L1
DATA
MEMORY
DMA
CONTROLLER
DMA CORE BUS
EXTERNAL ACCESS BUS
EXTERNAL PORT
FLASH, SDRAM CONTROL
DMA
EXTERNAL
BUS
16
BOOT ROM
WATCHDOG
TIMER
RTC
PPI
TIMER0-2
SPI
UART
SPORT0-1
GPIO
PORT
F
Figure 1. Functional Block Diagram
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.
Rev. I
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