ADAU1372_15 Datasheet, PDF (1/92 Pages) Analog Devices – Quad ADC, Dual DAC, Low Latency, Low Power Codec

Data Sheet
Quad ADC, Dual DAC, Low Latency,
Low Power Codec
ADAU1372
FEATURES
APPLICATIONS
Low latency, 24-bit ADCs and DACs
102 dB SNR (through PGA and ADC with A-weighted filter)
107 dB dynamic range (through DAC and headphone with
A-weighted filter)
Serial port sample rates from 8 kHz to 192 kHz
4 single-ended analog inputs, configurable as microphone or
line inputs
Dual stereo digital microphone inputs
Stereo analog audio output, single-ended or differential,
configurable as either line output or headphone driver
PLL supporting any input clock rate from 8 MHz to 27 MHz
Full-duplex, asynchronous sample rate converters (ASRCs)
Power supplies
Analog and digital input/output of 1.8 V to 3.3 V
Low power (15.5 mW)
I²C and SPI control interfaces for flexibility
5 multipurpose pins supporting dual stereo digital
microphone inputs, mute, push-button volume controls
Handsets, headsets, and headphones
Bluetooth® handsets, headsets, and headphones
Personal navigation devices
Digital still and video cameras
GENERAL DESCRIPTION
The ADAU1372 is a codec with four inputs and two outputs, which
incorporates asynchronous sample rate converters. Optimized
for low latency and low power, the ADAU1372 is ideal for headsets,
handsets, and headphones. The ADAU1372 has built-in program-
mable gain amplifiers (PGAs); thus, with the addition of just a
few passive components and a crystal, the ADAU1372 provides
a solution for headset audio needs, microphone preamplifiers,
ADCs, DACs, headphone amplifiers, and serial ports for
connections to an external DSP.
Note that throughout this data sheet, multifunction pins, such as
SCL/SCLK, are referred to either by the entire pin name or by a
single function of the pin, for example, SCLK, when only that
function is relevant.
FUNCTIONAL BLOCK DIAGRAM
MICBIAS0
MICBIAS1
AIN0REF
AIN0
AIN1REF
AIN1
DMIC0_1/MP4
DMIC2_3/MP5
AIN2REF
AIN2
AIN3REF
AIN3
CM
MICROPHONE
BIAS GENERATORS
PGA
Σ-Δ ADC
PGA
Σ-Δ ADC
DIGITAL
MICROPHONE
INPUTS
PGA
Σ-Δ ADC
PGA
Σ-Δ ADC
ADAU1372
POWER
MANAGEMENT
LDO
REGULATOR
PLL
CLOCK
OSCILLATOR
DECIMATOR
DECIMATOR
INPUT/OUTPUT
SIGNAL ROUTING
Σ-Δ
DACs
DECIMATOR
DECIMATOR
BIDIRECTIONAL
ASRCS
SERIAL I/O PORT
Σ-Δ
DACs
I²C/SPI CONTROL
INTERFACE
ADC_SDATA1/CLKOUT/MP6
XTALI/MCLKIN
XTALO
HPOUTLP/LOUTLP
HPOUTLN/LOUTLN
HPOUTRP/LOUTRP
HPOUTRN/LOUTRN
Figure 1.
Rev. 0
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