AD9858_15 Datasheet, PDF (1/32 Pages) Analog Devices – 1 GSPS Direct Digital Synthesizer

1 GSPS Direct Digital Synthesizer
AD9858
FEATURES
1 GSPS internal clock speed
Up to 2 GHz input clock (selectable divide-by-2)
Integrated 10-bit DAC
Excellent phase noise and SFDR
32-bit programmable frequency register
Simplified 8-bit parallel and SPI serial control interface
Automatic frequency sweeping capability
4 frequency profiles
3.3 V power supply
Power dissipation: 2 W typical
Integrated programmable charge pump and phase
frequency detector with fast lock circuit
Isolated charge pump supply up to 5 V
Integrated 2 GHz mixer
APPLICATIONS
VHF/UHF LO synthesis
Tuners
Instrumentation
Agile clock synthesis
Cellular base station hopping synthesizers
Radars
SONET/SDH clock synthesis
GENERAL DESCRIPTION
The AD9858 is a direct digital synthesizer (DDS) featuring a
10-bit digital-to-analog converter (DAC) operating up to 1 GSPS.
The AD9858 uses advanced DDS technology coupled with an
internal high speed, high performance DAC to form a digitally
programmable, complete high frequency synthesizer capable of
generating a frequency-agile analog output sine wave at up to
400 MHz. The AD9858 is designed to provide fast frequency
hopping and fine tuning resolution (32-bit frequency tuning
word). The frequency tuning and control words are loaded into
the AD9858 via parallel (8-bit) or serial loading formats. The
AD9858 contains an integrated charge pump (CP) and phase
frequency detector (PFD) for synthesis applications requiring
the combination of a high speed DDS along with phase-locked
loop (PLL) functions. An analog mixer is also provided on chip
for applications requiring the combination of a DDS, PLL, and
mixer, such as frequency translation loops and tuners. The AD9858
also features a divide-by-2 on the clock input, allowing the external
reference clock to be as high as 2 GHz.
The AD9858 is specified to operate over the extended industrial
temperature range of –40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
LO LO
IF IF
RF RF
DIV
DIV
÷M
PHASE
DETECTOR
PD
÷N
CP
CPISET
CHARGE
PUMP
DIGITAL PLL
ANALOG
MULTIPLIER
FREQUENCY ACCUMULATOR
PHASE ACCUMULATOR
AD9858
32
15
15
PHASE-TO-
AMPLITUDE
10
DAC
CONVERSION
DACISET
IOUT
IOUT
14
32
RESET
32
TIMING AND CONTROL LOGIC
CONTROL REGISTERS
÷8
POWER-
DOWN
LOGIC
PS0 PS1 I/O PORT
(SER/PAR)
Figure 1.
SYSCLK
M
U
X
÷2
FUD
SYNCLK
REFCLK
REFCLK
Rev. C
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