AD9789BBC Datasheet, PDF (1/76 Pages) Analog Devices – 14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing

14-Bit, 2400 MSPS RF DAC
with 4-Channel Signal Processing
AD9789
FEATURES
DOCSIS 3.0 performance: 4 QAM carriers
ACLR over full band (47 MHz to 1 GHz)
−75 dBc @ fOUT = 200 MHz
−72 dBc @ fOUT = 800 MHz (noise)
−67 dBc @ fOUT = 800 MHz (harmonics)
Unequalized MER = 42 dB
On chip and bypassable
4 QAM encoders with SRRC filters, 16× to 512× interpolation,
rate converters, and modulators
Flexible data interface: 4, 8, 16, or 32 bits wide with parity
Power: 1.6 W (IFS = 20 mA, fDAC = 2.4 GHz, LVDS interface)
Direct to RF synthesis support with fS mix mode
Built-in self-test (BIST) support
Input connectivity check
Internal random number generator
APPLICATIONS
Broadband communications systems
CMTS/DVB
Cellular infrastructure
Point-to-point wireless
GENERAL DESCRIPTION
The AD9789 is a flexible QAM encoder/interpolator/upconverter
combined with a high performance, 2400 MSPS, 14-bit RF digital-
to-analog converter (DAC). The flexible digital interface can
accept up to four channels of complex data. The QAM encoder
supports constellation sizes of 16, 32, 64, 128, and 256 with
SRRC filter coefficients for all standards.
The on-chip rate converter supports a wide range of baud rates
with a fixed DAC clock. The digital upconverter can place the
channels from 0 to 0.5 × fDAC. This permits four contiguous
channels to be synthesized and placed anywhere from dc to fDAC/2.
The AD9789 includes a serial peripheral interface (SPI) for
device configuration and status register readback. The flexible
digital interface can be configured for data bus widths of 4, 8,
16, and 32 bits. It can accept real or complex data.
The AD9789 operates from 1.5 V, 1.8 V, and 3.3 V supplies for
a total power consumption of 1.6 W. It is supplied in a 164-ball
chip scale package ball grid array for lower thermal impedance
and reduced package parasitics. No special power sequencing
is required. The clock receiver powers up muted to prevent
start-up noise.
PRODUCT HIGHLIGHTS
1. Highly integrated and configurable QAM mappers, inter-
polators, and upconverters for direct synthesis of one to
four DOCSIS- or DVB-C-compatible channels in a block.
2. Low noise and intermodulation distortion (IMD) perfor-
mance enable high quality synthesis of signals up to 1 GHz.
3. Flexible data interface supports LVDS for improved SFDR
or CMOS input data for less demanding applications.
4. Interface is configurable from 4-bit nibbles to 32-bit words
and can run at up to 150 MHz CMOS or 150 MHz LVDS
double data rate (DDR).
5. Manufactured on a CMOS process, the AD9789 uses a
proprietary switching technique that enhances dynamic
performance.
32 INPUT
PINS
AND
2 PARITY
PINS
DCO
CMOS
0 TO 15
LVDS
RISE
150MHz
LVDS/CMOS
CMOS
16 TO 31
LVDS
FALL
FS
FUNCTIONAL BLOCK DIAGRAM
DATA
QAM/
FILTER/
NCO
RETIMER
DATA FORMATTER/
ASSEMBLER
DATA
DATA
QAM/
FILTER/
NCO
QAM/
FILTER/
NCO
DATA
QAM/
FILTER/
NCO
Figure 1.
16×
INTERPOLATOR
AND BPF
+ SCALARS
14-BIT
2.4GSPS
DAC
SPI
IRQ RS
Rev. A
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