AD9258BCPZ-80 Datasheet, PDF (1/44 Pages) Analog Devices – 14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual
Analog-to-Digital Converter (ADC)
AD9258
FEATURES
SNR = 77.6 dBFS @ 70 MHz and 125 MSPS
SFDR = 88 dBc @ 70 MHz and 125 MSPS
Low power: 750 mW @ 125 MSPS
1.8 V analog supply operation
1.8 V CMOS or LVDS output supply
Integer 1-to-8 input clock divider
IF sampling frequencies to 300 MHz
−152.8 dBm/Hz small signal input noise with 200 Ω input
impedance @ 70 MHz and 125 MSPS
Optional on-chip dither
Programmable internal ADC voltage reference
Integrated ADC sample-and-hold inputs
Flexible analog input range: 1 V p-p to 2 V p-p
Differential analog inputs with 650 MHz bandwidth
ADC clock duty cycle stabilizer
95 dB channel isolation/crosstalk
Serial port control
User-configurable, built-in self-test (BIST) capability
Energy-saving power-down modes
APPLICATIONS
Communications
Diversity radio systems
Multimode digital receivers (3G)
GSM, EDGE, W-CDMA, LTE,
CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
General-purpose software radios
Broadband data applications
Ultrasound equipment
FUNCTIONAL BLOCK DIAGRAM
AVDD
SDIO/ SCLK/
DCS DFS ^CSB
DRVDD
AD9258
SPI
VIN+A
VIN–A
ADC
PROGRAMMING DATA
CMOS/LVDS ¹⁴
OUTPUT BUFFER
ORA
D13A (MSB)
TO
D0A (LSB)
VREF
SENSE
VCM
RBIAS
VIN–B
VIN+B
REF
SELECT
ADC
MULTICHIP
SYNC
DIVIDE 1
TO 8
DUTY CYCLE
DCO
STABILIZER GENERATION
CMOS/LVDS ¹⁴
OUTPUT BUFFER
CLK+
CLK–
DCOA
DCOB
ORB
D13B (MSB)
TO
D0B (LSB)
AGND SYNC
PDWN
OEB
NOTES
1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;
SEE FIGURE 7 FOR LVDS PIN NAMES.
Figure 1.
PRODUCT HIGHLIGHTS
1. On-chip dither option for improved SFDR performance
with low power analog input.
2. Proprietary differential input that maintains excellent SNR
performance for input frequencies up to 300 MHz.
3. Operation from a single 1.8 V supply and a separate digital
output driver supply accommodating 1.8 V CMOS or
LVDS outputs.
4. Standard serial port interface (SPI) that supports various
product features and functions, such as data formatting
(offset binary, twos complement, or gray coding), enabling
the clock DCS, power-down, test modes, and voltage
reference mode.
5. Pin compatibility with the AD9268, allowing a simple
migration from 14 bits to 16 bits. The AD9258 is also pin
compatible with the AD9251, AD9231, and AD9204 family
of products for lower sample rate, low power applications.
Rev. A
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