AD8331_06 Datasheet, PDF (1/40 Pages) Analog Devices – Ultralow Noise VGAs with Preamplifier and Programmable RIN

Ultralow Noise VGAs with
Preamplifier and Programmable R_IN
AD8331/AD8332/AD8334
FEATURES
Ultralow noise preamplifier
Voltage noise = 0.74 nV/√Hz
Current noise = 2.5 pA/√Hz
3 dB bandwidth
AD8331: 120 MHz
AD8332, AD8334: 100 MHz
Low power
AD8331: 125 mW/channel
AD8332, AD8334: 145 mW/channel
Wide gain range with programmable postamp
−4.5 dB to +43.5 dB
+7.5 dB to +55.5 dB
Low output-referred noise: 48 nV/√Hz typical
Active input impedance matching
Optimized for 10-bit/12-bit ADCs
Selectable output clamping level
Single 5 V supply operation
AD8332 and AD8334 available in lead frame chip scale package
APPLICATIONS
Ultrasound and sonar time-gain controls
High performance AGC systems
I/Q signal processing
High speed, dual ADC drivers
GENERAL DESCRIPTION
The AD8331/AD8332/AD8334 are single-, dual-, and quad-
channel ultralow noise, linear-in-dB, variable gain amplifiers
(VGAs). Optimized for ultrasound systems, they are usable as a
low noise variable gain element at frequencies up to 120 MHz.
Included in each channel are an ultralow noise preamplifier
(LNA), an X-AMP® VGA with 48 dB of gain range, and a
selectable gain postamplifier with adjustable output limiting.
The LNA gain is 19 dB with a single-ended input and
differential outputs. Using a single resistor, the LNA input
impedance can be adjusted to match a signal source without
compromising noise performance.
The 48 dB gain range of the VGA makes these devices suitable
for a variety of applications. Excellent bandwidth uniformity is
maintained across the entire range. The gain control interface
provides precise linear-in-dB scaling of 50 dB/V for control
voltages between 40 mV and 1 V. Factory trim ensures excellent
part-to-part and channel-to-channel gain matching.
FUNCTIONAL BLOCK DIAGRAM
LON LOP VIP VIN
VCM
HILO
INH
LMD
LNA
+
19dB
–
V_MID
3.5dB/15.5dB
–
48dB
ATTENUATOR
21dB
PA
+
VOH
VOL
LNA VCM
BIAS
VGA BIAS AND
INTERPOLATOR
GAIN
CONTROL
INTERFACE
CLAMP
AD8331/AD8332/AD8334
RCLMP
ENB GAIN
Figure 1. Signal Path Block Diagram
60
V_GAIN = 1V
50
V_GAIN = 0.8V
40
V_GAIN = 0.6V
30
V_GAIN = 0.4V
20
V_GAIN = 0.2V
10
V_GAIN = 0V
HIGH GAIN
MODE
0
–10
100k
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 2. Frequency Response vs. Gain
Differential signal paths result in superb second- and third-
order distortion performance and low crosstalk.
The VGA’s low output-referred noise is advantageous in driving
high speed differential ADCs. The gain of the postamplifier can
be pin selected to 3.5 dB or 15.5 dB to optimize gain range and
output noise for 12-bit or 10-bit converter applications. The
output can be limited to a user-selected clamping level,
preventing input overload to a subsequent ADC. An external
resistor adjusts the clamping level.
The operating temperature range is −40°C to +85°C. The
AD8331 is available in a 20-lead QSOP package, the AD8332 is
available in 28-lead TSSOP and 32-lead LFCSP packages, and
the AD8334 is available in a 64-lead LFCSP package.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
www.analog.com
Fax: [phone]
©2006 Analog Devices, Inc. All rights reserved.