AD8183 Datasheet, PDF (1/16 Pages) Analog Devices – 380 MHz, 25 mA, Triple 2:1 Multiplexers

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FEATURES
Fully Buffered Inputs and Outputs
Fast Channel-to-Channel Switching: 15 ns
High Speed
380 MHz Bandwidth (–3 dB) 200 mV p-p
310 MHz Bandwidth (–3 dB) 2 V p-p
1000 V/␮s Slew Rate G = +1, 2 V Step
1150 V/␮s Slew Rate G = +2, 2 V Step
Fast Settling Time of 15 ns to 0.1%
Low Power: 25 mA
Excellent Video Specifications (R_L = 150 ⍀)
Gain Flatness of 0.1 dB to 90 MHz
0.01% Differential Gain Error
0.02؇ Differential Phase Error
Low All-Hostile Crosstalk –84 dB @ 5 MHz
–54 dB @ 50 MHz
Low Channel-to-Channel Crosstalk –56 dB @ 100 MHz
High “OFF” Isolation of –100 dB @ 10 MHz
Low Cost
Fast High Impedance Output Disable Feature for
Connecting Multiple Devices
APPLICATIONS
Pixel Switching for “Picture-In-Picture”
Switching RGB in LCD and Plasma Displays
RGB Video Switchers and Routers
PRODUCT DESCRIPTION
The AD8183 (G = +1) and AD8185 (G = +2) are high speed
triple 2:1 multiplexers. They offer –3 dB signal bandwidth up to
380 MHz, along with slew rate of 1000 V/µs. With better than
–90 dB of channel-to-channel crosstalk and isolation at 10 MHz,
they are useful in many high-speed applications. The differential
gain and differential phase errors of 0.01% and 0.02° respectively,
along with 0.1 dB flatness to 90 MHz make the AD8183 and
AD8185 ideal for professional video and RGB multiplexing. They
offer 15 ns channel-to-channel switching time, making them
an excellent choice for switching video signals, while consuming
less than 25 mA on ± 5 V supply voltages.
Both devices offer a high speed disable feature that can set the
output into a high impedance state. This allows the building of
larger input arrays while minimizing “OFF” channel output
loading. They operate on voltage supplies of ± 5 V and are offered
in a 24-lead TSSOP package.
380 MHz, 25 mA,
Triple 2:1 Multiplexers
AD8183/AD8185*
FUNCTIONAL BLOCK DIAGRAM
IN0A 1
DGND 2
IN1A 3
GND 4
IN2A 5
V_CC 6
V_EE 7
IN2B 8
GND 9
IN1B 10
GND 11
IN0B 12
AD8183/AD8185
24 V_CC
SELECT
23 OE
DISABLE
22 SEL A/B
21 V_CC
0
20 OUT0
19 V_EE
1
18 OUT1
17 V_CC
2
16 OUT2
15 V_EE
14 DVCC
13 V_CC
Table I. Truth Table
SEL A/B
OE
OUT
0
0
INA
1
0
INB
0
1
High Z
1
1
High Z
V_O = 1.4V STEP
1.4V _{RL = 150⍀}
1.2V
1.0V
0.8V
0.6V
0.4V
0.2V
0.0V
200mV
2ns
Figure 1. AD8185 Pulse Response; R_L = 150 Ω
*Patents pending.
REV. 0
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