AD7765_07 Datasheet, PDF (1/32 Pages) Analog Devices – 24-Bit, 156 kSPS, 112 dB Σ-Δ ADC with On-Chip Buffers and Serial Interface

24-Bit, 156 kSPS, 112 dB Σ-Δ ADC
with On-Chip Buffers and Serial Interface
AD7765
FEATURES
High performance 24-bit ∑-∆ ADC
115 dB dynamic range at 78 kHz output data rate
112 dB dynamic range at 156 kHz output data rate
156 kHz maximum fully filtered output word rate
Pin-selectable oversampling rate (128× and 256×)
Low power mode
Flexible SPI
Fully differential modulator input
On-chip differential amplifier for signal buffering
On-chip reference buffer
Full band low-pass finite impulse response (FIR) filter
Overrange alert pin
Digital gain correction registers
Power-down mode
Synchronization of multiple devices via SYNC pin
Daisy chaining
APPLICATIONS
Data acquisition systems
Vibration analysis
Instrumentation
GENERAL DESCRIPTION
The AD7765 is a high performance, 24-bit Σ-Δ analog-to-digital
converter (ADC). It combines wide input bandwidth, high
speed, and performance of 112 dB dynamic range at a 156 kHz
output data rate. With excellent dc specifications, the converter
is ideal for high speed data acquisition of ac signals where dc
data is also required.
Using the AD7765 eases the front-end antialias filtering
requirements, simplifying the design process significantly. The
AD7765 offers pin-selectable decimation rates of 128× and
256×. Other features include an integrated buffer to drive the
reference as well as a fully differential amplifier to buffer and
level shift the input to the modulator.
An overrange alert pin indicates when an input signal has
exceeded the acceptable range. The addition of internal gain
and internal overrange registers make the AD7765 a compact,
highly integrated data acquisition device requiring minimal
peripheral components.
The AD7765 also offers a low power mode, significantly
reducing power dissipation without reducing the output data
rate or available input bandwidth.
FUNCTIONAL BLOCK DIAGRAM
V_OUTA– V_OUTA+ V_IN+ V_IN–
MCLK GND
V_INA+
V_INA–
DIFF
V_REF+
BUF
MULTIBIT
Σ-Δ
MODULATOR
RECONSTRUCTION
AV_DD1
AV_DD2
AV_DD3
AV_DD4
DV_DD
OVERRANGE
REFGND
SYNC
RESET/PWRDWN
INTERFACE LOGIC AND
OFFSET AND GAIN
CORRECTION REGISTERS
DECIMATION
FIR FILTER ENGINE
AD7765
DEC_RATE
R_BIAS
FSO SCO SDI SDO FSI
Figure 1.
The differential input is sampled at up to 40 MSPS by an analog
modulator. The modulator output is processed by a series of
low-pass filters. The external clock frequency applied to the
AD7765 determines the sample rate, filter corner frequencies,
and output word rate.
The AD7765 device boasts a full band on-board FIR filter. The
full stop-band attenuation of the filter is achieved at the Nyquist
frequency. This feature offers increased protection from signals
that lie above the Nyquist frequency being aliased back into the
input signal bandwidth.
The reference voltage supplied to the AD7765 determines the
input range. With a 4 V reference, the analog input range is
±3.2768 V differential biased around a common mode of
2.048 V. This common-mode biasing can be achieved using
the on-chip differential amplifier, further reducing the external
signal conditioning requirements.
The AD7765 is available in a 28-lead TSSOP package and is
specified over the industrial temperature range from −40°C
to +85°C.
Table 1. Related Devices
Part No.
AD7760
AD7762
AD7763
AD7764
AD7766
AD7767
Description
2.5 MSPS, 100 dB, parallel output on-chip buffers
625 kSPS, 109 dB, parallel output on-chip buffers
625 kSPS, 109 dB, serial output, on-chip buffers
312 kSPS, 109 dB, serial output, on-chip buffers
125 kSPS, 108 dB, serial output, 20 mW max power
125 kSPS, 108 dB, serial output, 20 mW max power
Rev. 0
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