AD7176-2 Datasheet, PDF (1/68 Pages) Analog Devices – The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed Σ-Δ analog-to-digital converter (ADC) for low band-width input signals.

Data Sheet
24-Bit, 250 kSPS Sigma-Delta ADC
with 20 µs Settling
AD7176-2
FEATURES
GENERAL DESCRIPTION
Fast and flexible output rate—5 SPS to 250 kSPS
Fast settling time—20 µs
Channel scan data rate of 50 kSPS/channel
Performance specifications
17 noise free bits at 250 kSPS
20 noise free bits at 2.5 kSPS
22 noise free bits at 5 SPS
INL ±2.5 ppm of FSR
85 dB rejection of 50 Hz and 60 Hz with 50 ms settling
User-configurable input channels
2 fully differential or 4 pseudo differential
Crosspoint multiplexer
On-chip 2.5 V reference (drift 2 ppm/°C)
Internal oscillator, external crystal, or external clock
Power supply
Single supply: 5 V AVDD1, 2 V to 5 V AVDD2 and IOVDD
Optional split supply: AVDD1 and AVSS ± 2.5 V
Current: 7.8 mA
Temperature range: −40°C to +105°C
3- or 4-wire serial digital interface (Schmitt trigger on SCLK)
CRC error checking
SPI, QSPI, MICROWIRE, and DSP compatible
APPLICATIONS
Process control: PLC/DCS modules
Temperature and pressure measurement
Medical and scientific multichannel instrumentation
Chromatography
The AD7176-2 is a fast settling, highly accurate, high resolution,
multiplexed Σ-Δ analog-to-digital converter (ADC) for low band-
width input signals. Its inputs can be configured as two fully
differential or four pseudo differential inputs via the integrated
crosspoint multiplexer. An integrated precision, 2.5 V, low drift
(2 ppm/°C), band gap internal reference (with an output
reference buffer) adds functionality and reduces the external
component count.
The maximum channel scan data rate is 50 kSPS (with a settling
time of 20 µs), resulting in fully settled data of 17 noise free bits.
User-selectable output data rates range from 5 SPS to 250 kSPS.
The resolution increases at lower speeds.
The AD7176-2 offers three key digital filters. The fast settling filter
maximizes the channel scan rate. The Sinc3 filter maximizes the
resolution for single-channel, low speed applications. For 50 Hz
and 60 Hz environments, the AD7176-2 specific filter minimizes
the settling times or maximizes the rejection of the line frequency.
These enhanced filters enable simultaneous 50 Hz and 60 Hz rejec-
tion with a 27 SPS output data rate (with a settling time of 36 ms).
System offset and gain errors can be corrected on a per channel
basis. This per channel configurability extends to the type of filter
and output data rate used for each channel. All switching of the
crosspoint multiplexer is controlled by the ADC and can be con-
figured to automatically control an external multiplexer via the
GPIO pins.
The specified operating temperature range is −40°C to +105°C.
The AD7176-2 is housed in a 24-lead TSSOP package.
FUNCTIONAL BLOCK DIAGRAM
AVDD1 AVDD2 REGCAPA REF– REF+ REFOUT
IOVDD REGCAPD
1.8V
LDO
BUFFERED
PRECISION
REFERENCE
1.8V
LDO
AIN0
AIN1
AIN2
AIN3
AIN4
INT
REF
Σ-Δ ADC
DIGITAL
FILTER
SERIAL
INTERFACE
AND CONTROL
CROSSPOINT
MULTIPLEXER
I/O
CONTROL
XTAL AND INTERNAL
CLOCK OSCILLATOR
CIRCUITRY
AVSS
GPIO0 GPIO1
XTAL1 CLKIO/XTAL2
Figure 1.
AD7176-2
DGND
CS
SCLK
DIN
DOUT/RDY
SYNC/ERROR
Rev. 0
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