AD71028_15 Datasheet, PDF (1/20 Pages) Analog Devices – Dual Digital BTSC Encoder with Integrated DAC

FEATURES
2 complete independent BTSC encoders
Pilot tone generator
Includes subcarrier modulation
Typical 23 dB to 27 dB separation, 16 dB minimum
Signal bandwidth of 14 kHz
Phat-Stereo^TM algorithm for stereo image enhancement
Dialog enhancement function for playing wide dynamic
range video sources over built-in TV speakers
Includes L-R dual-band compressor
SPI® port for control of modes and effects
Differential output for optimum performance
DAC performance: 92 dB dynamic range, –92 dB THD+N
Output level control for setting aural carrier deviation
Flexible serial data port with right-justified, left-justified,
I²S compatible, and DSP serial port modes
48-lead LQFP plastic package
APPLICATIONS
Digital set-top box BTSC encoder
Dual Digital BTSC Encoder
with Integrated DAC
AD71028
PRODUCT OVERVIEW
The AD71028 dual digital BTSC encoder provides two complete
digital BTSC encoder channels, including the pilot-tone
generation and subcarrier mixing functions. Two built-in high
performance DACs are provided to output the BTSC baseband
composite signal. The output of the AD71028 can be connected
with minimal external circuitry to the input of a 4.5 MHz aural
FM modulator.
In addition to the BTSC encoders, the AD71028 also includes a
stereo image enhancement function, Phat Stereo, to increase the
sense of spaciousness available from closely spaced TV
loudspeakers. A dialog enhancement algorithm is also included
to solve the problem of playing wide dynamic range sources
over limited-performance TV speakers and amplifiers. An
extensive SPI port allows click-free parameter updates.
The AD71028 also includes ADI’s patented multibit Σ-∆ DAC
architecture. This architecture provides 92 dB SNR and THD+N
of –92 dB.
SERIAL 3
INPUT A
CLOCK
SIGNAL
GROUP
SERIAL ³
INPUT B
SPI I/O
4
GROUP
FUNCTIONAL BLOCK DIAGRAM
PLL DIVIDERS
SERIAL
INPUT
CLOCK
DOUBLER
BTSC
ENCODER
CORE A
DAC
PLL DIVIDERS
CLOCK
DOUBLER
SERIAL
INPUT
BTSC
ENCODER
CORE B
SPI PORT
CONTROL REGISTERS
PARAMETER RAM
Figure 1. Functional Block Diagram
BIAS
DAC
AD71028
BTSC
ENCODED
OUTPUT A
ANALOG
BIAS
BTSC
ENCODED
OUTPUT B
Rev. 0
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