AD5665_15 Datasheet, PDF (1/36 Pages) Analog Devices – Quad, 12-/14-/16-Bit nanoDACs with 5 ppm/C On-Chip Reference, IC Interface

Data Sheet
Quad, 12-/14-/16-Bit nanoDACs with
5 ppm/°C On-Chip Reference, I²C Interface
AD5625R/AD5645R/AD5665R, AD5625/AD5665
FEATURES
Low power, smallest pin-compatible, quad nanoDACs
AD5625R/AD5645R/AD5665R
12-/14-/16-bit nanoDACs
On-chip, 2.5 V, 5 ppm/°C reference in TSSOP
On-chip, 2.5 V, 10 ppm/°C reference in LFCSP
On-chip, 1.25 V, 10 ppm/°C reference in LFCSP
AD5625/AD5665
12-/16-bit nanoDACs
External reference only
3 mm × 3 mm, 10-lead LFCSP; 14-lead TSSOP; and 1.665 mm
× 2.245 mm, 12-ball WLCSP
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale/midscale
Per channel power-down
Hardware LDAC and CLR functions
I²C-compatible serial interface supports standard (100 kHz),
fast (400 kHz), and high speed (3.4 MHz) modes
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5625R/AD5645R/AD5665R and AD5625/AD5665
members of the nanoDAC® family are low power, quad, 12-/
14-/16-bit, buffered voltage-out DACs with/without an on-chip
reference. All devices operate from a single 2.7 V to 5.5 V supply,
are guaranteed monotonic by design, and have an I²C-compatible
serial interface.
The AD5625R/AD5645R/AD5665R have an on-chip reference. The
LFCSP versions of the AD56x5R have a 1.25 V or 2.5 V, 10 ppm/°C
reference, giving a full-scale output range of 2.5 V or 5 V; the
TSSOP versions of the AD56x5R have a 2.5 V, 5 ppm/°C refer-
ence, giving a full-scale output range of 5 V. The WLCSP package
has a 1.25 V reference. The on-chip reference is off at power-up,
allowing the use of an external reference. The internal reference is
enabled via a software write. The AD5625/AD5665 require an
external reference voltage to set the output range of the DAC.
The part incorporates a power-on reset circuit that ensures that
the DAC output powers up to 0 V (POR = GND) or midscale
(POR = VDD) and remains there until a valid write occurs. The
on-chip precision output amplifier enables rail-to-rail output swing.
Rev. C
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ADDR1
ADDR2
SCL
SDA
FUNCTIONAL BLOCK DIAGRAMS
V_DD
GND
V_REFIN/V_REFOUT
AD5625R/AD5645R/AD5665R
INPUT
REGISTER
DAC
REGISTER
1.25V/2.5V REF
BUFFER
STRING
DAC A
INPUT
REGISTER
DAC
REGISTER
BUFFER
STRING
DAC B
INPUT
REGISTER
DAC
REGISTER
BUFFER
STRING
DAC C
INPUT
REGISTER
DAC
REGISTER
BUFFER
STRING
DAC D
POWER-ON RESET
POWER-DOWN LOGIC
V_OUTA
V_OUTB
V_OUTC
V_OUTD
NOTES
LDAC CLR
POR
1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:
ADDR2, LDAC, CLR, POR.
Figure 1. AD5625R/AD5645R/AD5665R
V_DD
GND
V_REFIN
ADDR1
AD5625/AD5665
INPUT
REGISTER
DAC
REGISTER
STRING
DAC A
BUFFER
ADDR2
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
SCL
SDA
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC C
BUFFER
STRING
DAC D
BUFFER
POWER-ON RESET
POWER-DOWN LOGIC
V_OUTA
V_OUTB
V_OUTC
V_OUTD
NOTES
LDAC CLR
POR
1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:
ADDR2, LDAC, CLR, POR.
Figure 2. AD5625/AD5665
The AD56x5R/AD56x5 use a 2-wire I²C-compatible serial
interface that operates in standard (100 kHz), fast (400 kHz),
and high speed (3.4 MHz) modes.
Table 1. Related Devices
Part No.
AD5025/AD5045/AD5065
AD5624R/AD5644R/AD5664R,
AD5624/AD5664
AD5627R/AD5647R/AD5667R,
AD5627/AD5667
AD5666
Description
Dual 12-/14-/16-bit DACs
Quad SPI 12-/14-/16-bit DACs,
with/without internal reference
Dual I²C 12-/14-/16-bit DACs,
with/without internal reference
Quad SPI 16-bit DAC with internal
reference
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