AD5533_15 Datasheet, PDF (1/16 Pages) Analog Devices – 32-Channel Infinite Sample-and-Hold

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32-Channel Infinite
Sample-and-Hold
AD5533^*
FEATURES
Infinite Sample-and-Hold Capability to ؎0.018% Accuracy
High Integration:
32-Channel DAC in 12 mm ؋ 12 mm CSPBGA
Per Channel Acquisition Time of 16 ␮s Max
Adjustable Voltage Output Range
Output Impedance 0.5 ⍀
Output Voltage Span 10 V
Readback Capability
DSP/Microcontroller Compatible Serial Interface
Parallel Interface
Temperature Range –40؇C to +85؇C
APPLICATIONS
Optical Networks
Automatic Test Equipment
Level Setting
Instrumentation
Industrial Control Systems
Data Acquisition
Low Cost I/O
GENERAL DESCRIPTION
The AD5533 combines a 32-channel voltage translation function
with an infinite output hold capability. An analog input voltage
on the common input pin, V_IN, is sampled and its digital repre-
sentation transferred to a chosen DAC Register. V_OUT for this
DAC is then updated to reflect the new contents of the DAC
register. Channel selection is accomplished via the parallel address
inputs A0–A4 or via the serial input port. The output voltage
range is determined by the offset voltage at the OFFS_IN pin
and the gain of the output amplifier. It is restricted to a range
from V_SS + 2 V to V_DD – 2 V because of the headroom of the
output amplifier.
The device is operated with AV_CC = +5 V ± 5%, DV_CC = +2.7 V to
+5.25 V, V_SS = –4.75 V to –16.5 V, and V_DD = +8 V to +16.5 V
and requires a stable 3 V reference on REF_IN as well as an
offset voltage on OFFS_IN.
PRODUCT HIGHLIGHTS
1. Infinite Droopless Sample-and-Hold Capability.
2. The AD5533 is available in a 74-lead CSPBGA with a body
size of 12 mm Ï« 12 mm.
FUNCTIONAL BLOCK DIAGRAM
DV_CC AV_CC
REF IN REF OUT OFFS IN ^VDD ^VSS
V_IN
TRACK / RESET
BUSY
DAC GND
AGND
DGND
SER / PAR
ADC
DAC
V_OUT 0
AD5533
INTERFACE
CONTROL
LOGIC
SCLK D_IN D_OUT
DAC
DAC
V_OUT 31
OFFS OUT
ADDRESS INPUT REGISTER
WR
SYNC/ CS ^{A4 –A0 CAL OFFSET SEL}
*Protected by U.S. Patent No. 5,969,657.
REV. A
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