AD5399 Datasheet, PDF (1/12 Pages) Analog Devices – Twos Complement, Dual 12-Bit DAC with Internal REF and Fast Settling Time

Twos Complement, Dual 12-Bit DAC
with Internal REF and Fast Settling Time
AD5399
FEATURES
2-channel 12-bit DAC
Twos complement facilitates bipolar applications
Bipolar zero with 2 V dc offset
Built-in 2.000 V precision reference with 10 ppm/°C typ TC
Buffered voltage output: 0 V to 4 V
Single-supply operation: 4.5 V to 5.5 V
Fast 0.8 µs settling time typ
Ultracompact MSOP-10 package
Monotonic DNL < ±1 LSB
Optimized accuracy at zero scale
Power-on reset to VREF
3-wire serial data input
Extended temperature range: –40°C to +105°C
APPLICATIONS
Single-supply bipolar converter operations
General-purpose DSP applications
Digital gain and offset controls
Instrumentation level settings
Disk drive control
Precision motor control
GENERAL DESCRIPTION
The AD5399 is the industry-first dual 12-bit digital-to-analog
converter that accepts twos complement digital coding with 2 V
dc offset for single-supply operation. Augmented with a built-in
precision reference and a solid buffer amplifier, the AD5399 is
the smallest self-contained 12-bit precision DAC that fits many
general-purpose as well as DSP specific applications. The twos
complement programming facilitates the natural coding
implementation commonly found in DSP applications, and
allows operation in single supply. The AD5399 provides a 2 V
reference output, VREF, for bipolar zero monitoring. It can also
be used for other on-board components that require a precision
reference. The device is specified for operation from 5 V ± 10%
single supply with bipolar output swing from 0 V to 4 V
centered at 2 V.
The AD5399 is available in the compact 1.1 mm low profile
MSOP-10 package. All parts are guaranteed to operate over the
extended industrial temperature range of –40°C to +105°C.
Rev. D
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infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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FUNCTIONAL BLOCK DIAGRAM
V_TP
V_BZ(V_REF) = 2V
V_DD
AD5399
X×2
V_OUTA V_BZ + 2V = 4V
V_REF 2V
×2
V_OUTB ^{VBZ – 2V = 0V}
AGND
CS
CLK
SDI
DGND
DECODER SW
DRIVER A
DECODER SW
DRIVER B
12
12
ADDR
DAC A
DECODE REGISTER
EN
A0
DAC B
REGISTER
12
16-BIT
D15...D0
POWER-ON
RESET
Figure 1.
VOUT = ((D – 2048)/4096 × 4 V) + 2 V for 0 ≤ D ≤ 4095, where D
is the decimal code.
Table 1. Examples of Twos Complement Codes
Twos Complement
D
Scale
2047
4095 +FS
2046
4094 +FS – 1 LSB
1
2049 BZS + 1 LSB
0
2048 BZS
4095
2047 BZS – 1 LSB
2049
1
–FS + 1 LSB
2048
0
–FS
FS = Full Scale, BZS = Bipolar Zero Scale.
4.0
VOUT (V)
4.000
3.999
2.001
2.000
1.999
0.001
0.000
3.5
3.0
V_OUT = [(0 – 2048)/4096 × 4V] + 2V
2.5
2.0
1.5
1.0
0.5
0
0
512 1024 1536 2048 2560 3072 3584 4096
TWOS COMPLEMENT CODE
Figure 2. Output vs. Twos Complement Code
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