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A3PE3000-1FGG896I Datasheet, PDF (50/152 Pages) Actel Corporation – ProASIC3E Flash Family FPGAs
ProASIC3E DC and Switching Characteristics
3.3 V GTL+
Gunning Transceiver Logic Plus is a high-speed bus standard (JESD8-3). It provides a differential
amplifier input buffer and an open-drain output buffer. The VCCI pin should be connected to
3.3 V.
Table 2-50 • Minimum and Maximum DC Input and Output Levels
3.3 V GTL+
VIL
Drive
Strength Min., V Max., V
VIH
VOL
VOH IOL IOH
IOSL
IOSH
IIL IIH
Min., V Max., V Max., V Min., V mA mA Max., mA1 Max., mA1 µA2 µA2
35 mA
–0.3 VREF – 0.1 VREF + 0.1 3.6
0.6
– 35 35 181
268
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
10 10
VTT
GTL+ 25
Test Point
10 pF
Figure 2-13 • AC Loading
Table 2-51 • AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring
Point* (V)
VREF (typ.) (V)
VTT (typ.) (V)
VREF – 0.1
VREF + 0.1
1.0
1.0
1.5
* Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
CLOAD (pF)
10
Timing Characteristics
Table 2-52 • 3.3 V GTL+
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 3.0 V, VREF = 1.0 V
Speed
Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH tLZ tHZ
–F
0.72 2.47 0.05 1.91 0.51 2.51 2.47
tZLS
5.20
tZHS
5.15
Units
ns
Std.
0.60 2.06 0.04 1.59 0.43 2.09 2.06
4.33 4.29
ns
–1
0.51 1.75 0.04 1.35 0.36 1.78 1.75
3.68 3.65
ns
–2
0.45 1.53 0.03 1.19 0.32 1.56 1.53
3.23 3.20
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating
values.
2-38
v1.2