A54SX08-TQ176 Datasheet, PDF (17/64 Pages) Actel Corporation – SX Family FPGAs

SX Family FPGAs
A54SX16P AC Specifications (3.3 V PCI Operation)
Table 1-9 • A54SX16P AC Specifications (3.3 V PCI Operation)
Symbol Parameter
Condition
Min.
Max.
Units
I_OH(AC)
I_OL(AC)
Switching Current High
(Test Point)
Switching Current High
(Test Point)
0 < V_OUT ≤ 0.3V_CC1
0.3V_CC ≤ V_OUT < 0.9V_CC1
0.7V_CC < V_OUT < V_CC1, ²
V_OUT = 0.7V_CC2
V_CC > V_OUT ≥ 0.6V_CC1
0.6V_CC > V_OUT > 0.1V_CC1
0.18V_CC > V_OUT > 0^{1, 2}
V_OUT = 0.18V_CC2
–12V_CC
–17.1 + (V_CC – V_OUT)
16V_CC
26.7V_OUT
mA
mA
EQ 1-3 on page 1-14
–32V_CC
mA
mA
mA
EQ 1-4 on page 1-14 mA
38V_CC
I_CL
Low Clamp Current
–3 < V_IN ≤ –1
–25 + (V_IN + 1)/0.015
mA
I_CH
High Clamp Current
–3 < V_IN ≤ –1
25 + (V_IN – V_OUT – 1)/0.015
mA
slew_R
Output Rise Slew Rate³ 0.2V_CC to 0.6V_CC load
1
4
V/ns
slew_F
Output Fall Slew Rate³ 0.6V_CC to 0.2V_CC load
1
4
V/ns
Notes:
1. Refer to the V/I curves in Figure 1-10 on page 1-14. Switching current characteristics for REQ# and GNT# are permitted to be
one half of that specified here; i.e., half size output drivers may be used on these signals. This specification does not apply to
CLK and RST# which are system outputs. “Switching Current High” specification are not relevant to SERR#, INTA#, INTB#,
INTC#, and INTD# which are open drain outputs.
2. Maximum current requirements must be met as drivers pull beyond the last step voltage. Equations defining these maximums
(C and D) are provided with the respective diagrams in Figure 1-10 on page 1-14. The equation defined maxima should be
met by design. In order to facilitate component testing, a maximum current test point is defined for each side of the output
driver.
3. This parameter is to be interpreted as the cumulative edge rate across the specified range, rather than the instantaneous rate
at any point within the transition range. The specified load (diagram below) is optional; i.e., the designer may elect to meet
this parameter with an unloaded output per the latest revision of the PCI Local Bus Specification. However, adherence to both
maximum and minimum parameters is required (the maximum is no longer simply a guideline). Rise slew rate does not apply
to open drain outputs.
Output
Buffer
Pin
1 kΩ
1/2 in. max.
10 pF
V_CC
1 kΩ
v3.2
1-13