A54SX08-TQ176 Datasheet, PDF (16/64 Pages) Actel Corporation – SX Family FPGAs

SX Family FPGAs
A54SX16P DC Specifications (3.3 V PCI Operation)
Table 1-8 • A54SX16P DC Specifications (3.3 V PCI Operation)
Symbol Parameter
Condition
Min.
Max. Units
V_CCA
Supply Voltage for Array
3.0
3.6
V
V_CCR
Supply Voltage required for Internal Biasing
3.0
3.6
V
V_CCI
Supply Voltage for I/Os
3.0
3.6
V
V_IH
Input High Voltage
0.5V_CC V_CC + 0.5
V
V_IL
Input Low Voltage
I_IPU
Input Pull-up Voltage¹
I_IL
Input Leakage Current²
0 < V_IN < V_CC
–0.5
0.3V_CC
V
0.7V_CC
V
±10
µA
V_OH
Output High Voltage
I_OUT = –500 µA
0.9V_CC
V
V_OL
Output Low Voltage
C_IN
Input Pin Capacitance³
I_OUT = 1500 µA
0.1V_CC
V
10
pF
C_CLK
C_IDSEL
CLK Pin Capacitance
IDSEL Pin Capacitance⁴
5
12
pF
8
pF
Notes:
1. This specification should be guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a
floated network. Applications sensitive to static power utilization should assure that the input buffer is conducting minimum current
at this input voltage.
2. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
3. Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK).
4. Lower capacitance on this input-only pin allows for non-resistive coupling to AD[xx].
1-12
v3.2