ACE24C512C Datasheet, PDF (10/18 Pages) ACE Technology Co., LTD. – Two-wire serial EEPROM

ACE24C512C
Two-wire serial EEPROM
(C) Acknowledge Polling
Once the internally timed write cycle has started and the ACE24C512C inputs are disabled,
acknowledge polling can be initiated. This involves sending a start condition followed by the device
address word. The read/write bit is representative of the operation desired. Only if the internal write
cycle has completed will the ACE24C512C respond with a “0”, allowing the read or write sequence to
continue.
(D) Write Identification Page
The Identification Page (128 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode. It is written by the Write Identification Page instruction. This
instruction uses the same protocol and format as Page Write (into memory array), except for the
following differences:
 Device type identifier = 1011b
 MSB address bits A14/A6 are don’t care except for address bit A10 which must be „0‟.
LSB address bits A5/A0 define the byte address inside the Identification page. If the Identification
page is locked, the data bytes transferred during the Write Identification Page instruction are not
acknowledged (NoACK).
(E) Lock Identification Page
The Lock Identification Page instruction (Lock ID) permanently locks the Identification page in
Read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with
the following specific conditions:
 Device type identifier = 1011b
 Address bit A10 must be „1‟; all other address bits are don’t care
 The data byte must be equal to the binary value xxxx xx1x, where x is don’t care
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write
select bit in the device address word is set to “1”. There are three read operations: Current Address Read;
Random Address Read and Sequential Read.
(A) Current Address Read
The internal data word address counter maintains the last address accessed during the last read or
write operation, incremented by one. This address stays valid between operations as long as the
chip power is maintained. The address roll-over during read is from the last byte of the last memory
page to the first byte of the first page.
Once the device address with the read/write select bit set to “1” is clocked in and acknowledged by
the ACE24C512C, the current address data word is serially clocked out. The microcontroller does
not respond with an input “0” but does generate a following stop condition (see Figure 10).
VER 1.1 10