AAT2820 Datasheet, PDF (15/18 Pages) Advanced Analogic Technologies – Triple-Output Charge Pump Regulator

AAT2820
Triple-Output Charge Pump Regulator
Flying and Output Capacitor Multiplier
Stages
A 0.1µF X7R or X5R ceramic capacitor is typically
used. The voltage rating of the flying and reservoir
output capacitors will vary with the number of
charge pump stages. The reservoir output capaci-
tor should be roughly 10X the flying capacitor. Use
larger capacitors for reduced output ripple. A 1µF
X7R or X5R type ceramic is typically used.
Positive Charge Pump Capacitor
Voltage Ratings
The absolute steady-state maximum output voltage
(neglecting the internal R_DS(ON) drop of the internal
MOSFETs) for the nth stage is:
V_BULK(n) = (n + 1) · V_IN - 2 · n · V_FWD
where V_FWD is the estimated forward drop of the
Schottky diode. This is also the voltage rating
required for the nth bulk capacitor in the positive
output charge pump.
The voltage rating for the nth flying capacitor in the
positive stage is:
V_FLY(n) = V_{BULK(n + 1)} - V_FWD
where V_BULK(0) is the input voltage (see Table 5).
# of Stages (n)
1
2
3
4
5
6
V_BULK(n)
9.4V
13.8V
18.2V
22.6V
27.0V
31.4V
V_FLY(n)
4.7V
9.1V
13.5V
17.9V
22.3V
26.7V
Table 5: Positive Charge Pump Capacitor
Voltages (V_FWD = 0.31V).
Negative Charge Pump Capacitor
Voltage Ratings
The absolute steady-state maximum output voltage
(neglecting the internal R_DS(ON) drop of the internal
MOSFETs) for the nth stage is:
V_BULK(n) = -n · V_IN + 2 · n · V_FWD
This is also the voltage rating required for the nth
bulk capacitor in the negative output charge pump.
The voltage rating for the nth flying capacitor in the
negative stage (see Table 6) is:
V_FLY(n) = V_FWD - V_BULK(n)
# of Stages (n)
1
2
3
4
5
6
V_BULK(n)
-4.4V
-8.8V
-13.2V
-17.6V
-22.0V
-26.4V
V_FLY(n)
4.7V
9.1V
13.5V
17.9V
22.3V
26.7V
Table 6: Negative Charge Pump Capacitor
Voltages (V_FWD = 0.31V).
PC Board Layout
The input and reference capacitor should be
placed as closely to the IC as possible. Place the
programming resistors (R1-R4) close to the IC,
minimizing trace length to FBN and FBP. Place the
main charge pump flying capacitor close to the C+
and C- pins, with wide traces and no vias. Place all
multiplier stage (charge pump) circuitry to the IC as
closely as possible using wide traces, and avoid
using vias when possible.
Figures 4 and 5 show the recommended evaluation
board layout with the TDFN44-16 package.
2820.2006.04.1.4
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