SN65LVDS104 Datasheet, PDF (1/33 Pages) Texas Instruments – 4-PORT LVDS AND 4-PORT TTL-TO-LVDS REPEATERS

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SN65LVDS104, SN65LVDS105
SLLS396G – SEPTEMBER 1999 – REVISED DECEMBER 2015
SN65LVDS10x 4-Port LVDS and 4-Port TTL-to-LVDS Repeaters
1 Features
•1 Receiver and Drivers Meet or Exceed the
Requirements of ANSI EIA/TIA-644 Standard
– SN65LVDS105 Receives Low-Voltage TTL
(LVTTL) Levels
– SN65LVDS104 Receives Differential Input
Levels, ±100 mV
• Typical Data Signaling Rates to 400 Mbps or
Clock Frequencies to 400 MHz
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical
Output Voltage of 350 mV and a 100-Ω Load
• Propagation Delay Time
– SN65LVDS105 – 2.2 ns (Typ)
– SN65LVDS104 – 3.1 ns (Typ)
• LVTTL Levels Are 5-V Tolerant
• Electrically Compatible With LVDS, PECL,
LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT,
SSTL, or HSTL Outputs With External Networks
• Driver Outputs Are High-Impedance When
Disabled or With V_CC <1.5 V
• Bus-Pin ESD Protection Exceeds 16 kV
• SOIC and TSSOP Packaging
2 Applications
• Clock Distribution
• Wireless Base Stations
• Network Routers
3 Description
The SN65LVDS10x are a differential line receiver and
a LVTTL input (respectively) connected to four
differential line drivers that implement the electrical
characteristics of low-voltage differential signaling
(LVDS). LVDS, as specified in EIA/TIA-644 is a data
signaling technique that offers low-power, low-noise
coupling, and switching speeds to transmit data at
relatively long distances. (Note: The ultimate rate and
distance of data transfer is dependent upon the
attenuation characteristics of the media, the noise
coupling to the environment, and other system
characteristics.)
The intended application of this device and signaling
technique is for point-to-point baseband data
transmission over controlled impedance media of
approximately 100 Ω. The transmission media may
be printed-circuit board traces, backplanes, or cables.
Having the drivers integrated into the same substrate,
along with the low pulse skew of balanced signaling,
allows extremely precise timing alignment of the
signals repeated from the input. This is particularly
advantageous in distribution or expansion of signals
such as clock or serial data stream.
The SN65LVDS10x are characterized for operation
from –40°C to 85°C.
The SN65LVDS10x are members of a family of LVDS
repeaters. A brief overview of the family is provided in
the Selection Guide to LVDS Repeaters section.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN65LVDS104,
SN65LVDS105
SOIC (16)
TSSOP (16)
9.90 mm × 3.91 mm
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SN65LVDS104 Logic Diagram (Positive Logic)
1Y
1Z
EN1
EN2
2Y
2Z
EN3
3Y
A
3Z
B
4Y
4Z
EN4
SN65LVDS105 Logic Diagram (Positive Logic)
1Y
1Z
EN1
EN2
2Y
2Z
EN3
3Y
3Z
A
4Y
4Z
EN4
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.