RL78-G1G Datasheet, PDF (1/70 Pages) Renesas Technology Corp – Ultra-low power consumption technology

RL78/G1G
RENESAS MCU
1. OUTLINE
Datasheet
R01DS0241EJ0130
Rev. 1.30
Sep 30, 2016
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1.1 Features
Ultra-low power consumption technology
• VDD = single power supply voltage of 2.7 to 5.5 V
• HALT mode
• STOP mode
• SNOOZE mode
RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed
from high-speed (0.04167 s: @ 24 MHz operation with
high-speed on-chip oscillator) to low-speed (1.0 s: @1
MHz operation with high-speed on-chip oscillator)
• Multiply/divide/multiply & accumulate instructions are
supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register  8)  4 banks
• On-chip RAM: 1.5 KB
Code flash memory
• Code flash memory: 8 to 16 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security
function)
• On-chip debug function
• Self-programming (flash shield window function)
High-speed on-chip oscillator
• Select from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz,
4 MHz, and 1 MHz
• High accuracy: ±2.0%
Operating ambient temperature
• TA = -40 to +85C
Power management and reset function
• On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and
reset from 6 levels)
Event link controller (ELC)
• Event signals of 18 to 19 types can be linked to the
specified peripheral function.
Serial interfaces
• CSI: 1 channel
• UART: 2 channels
• Simplified I²C: 1 channel
Timer
• 16-bit timer: 7 channels
(Timer Array Unit (TAU): 4 channels, Timer RJ: 1
channel, Timer RD: 2 channels)
• 12-bit interval timer: 1 channel
• Watchdog timer: 1 channel (operable with the dedicated
low-speed on-chip oscillator)
A/D converter
• 8/10-bit resolution A/D converter (VDD = 2.7 to 5.5 V)
• Analog input: 8 to 12 channels
• Internal reference voltage (1.45 V) and temperature
sensor^Note
Note: Selectable only in HS (high-speed main) mode.
Comparator
• 2 channels
• The voltage from a dedicated 8-bit DAC (resolution of
256 with VDD/AVREFP or VSS/AVREFM as the internally
generated reference voltage) can be selected as the
reference voltage.
Programmable gain amplifier
I/O port
• I/O port: 26 to 40
• Can be set to N-ch open drain, TTL input buffer, and on-
chip pull-up resistor
• Different potential interface: Can connect to a 2.5/3 V
device
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
Others
• On-chip BCD (binary-coded decimal) correction circuit
Remark: The function mounted depend on the product.
See 1.6 Outline of Functions.
R01DS0241EJ0130 Rev. 1.30
Sep 30, 2016
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