NL3HS644 Datasheet, PDF (1/8 Pages) ON Semiconductor – 4-Data Lane Switch

NL3HS644
2:1 MIPI D-PHY (1.5 Gbps)
4-Data Lane Switch
The NL3HS644 is a 4−data lane MIPI, D−PHY switch. This
single−pole double−throw (SPDT) switch is optimized for switching
between 2 high−speed or low−power MIPI sources. The NL3HS644 is
designed for MIPI specifications and allows connection to a CSI or
DSI module.
Features
• Operating Supply: V_CC = 1.65 V to 4.5 V
• Switch Signal Range: 0 to V_CC
• Signal Types: MIPI, D−PHY
• ON−Resistance:
R_ON = 8 W (Typ) HS MIPI
R_ON = 7.9 W (Typ) LP MIPI
• ON−Resistance Mismatch:
DR_ON = 0.09 W (Typ) HS MIPI
DR_ON = 0.17 W (Typ) LP MIPI
• ON Resistance Flatness:
R_{ON_FLAT} = 0.03 W (Typ) HS MIPI
R_{ON_FLAT} = 0.46 W (Typ) LP MIPI
• Supply Current: I_CC = 55 mA (Max)
• Hi−Z Supply Current: I_CCZ = 5 mA (Max)
• Off−Isolation: O_IRR = −27 dB (Typ)
• Crosstalk: X_TALK = −28 dB (Typ)
• Bandwidth: BW = 1,050 MHz (Typ)
• Channel to Channel Skew: t_SK = 63 ps (Typ)
• ON Capacitance: C_ON = 12.6 pF
• 36−Ball WLCSP Package, 2.36 mm x 2.36 mm
• This device is Pb−Free, Halogen−Free/BFR−Free and are
RoHS−Compliant
www.onsemi.com
WLCSP36
FC SUFFIX
CASE 567LR
MARKING DIAGRAM
XXXXXX
AWLYWW
G
XXXXXX = Device Code
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 8 of this data sheet.
Figure 1. Typical Application – Mobile Phone
© Semiconductor Components Industries, LLC, 2015
1
November, 2015 − Rev. 2
Publication Order Number:
NL3HS644/D