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NL37WZ17_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – Triple Noninverting Schmitt-Trigger Buffer | |||
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NL37WZ17
Triple Noninverting
SchmittâTrigger Buffer
The NL37WZ17 is a high performance buffer with SchmittâTrigger
inputs operating from a 1.65 to 5.5 V supply.
The NL37WZ17 can be used as a line receiver which will receive
slow input signals. The NL37WZ17 is capable of transforming slowly
changing input signals into sharply defined, jitterâfree output signals.
In addition, it has a greater noise margin than conventional inverters.
The NL37WZ17 has hysteresis between the positiveâgoing and the
negativeâgoing input thresholds (typically 1.0 V) which is determined
internally by transistor ratios and is essentially insensitive to
temperature and supply voltage variations.
Features
⢠Designed for 1.65 V to 5.5 V VCC Operation
⢠Over Voltage Tolerant Inputs and Outputs
⢠LVTTL Compatible â Interface Capability with 5 V TTL Logic
with VCC = 3 V
⢠LVCMOS Compatible
⢠24 mA Balanced Output Sink and Source Capability
⢠Near Zero Static Supply Current Substantially Reduces System
Power Requirements
⢠Current Drive Capability is 24 mA at the Outputs
⢠Chip Complexity: FET = 94
⢠PbâFree Package is Available
IN A1 1
OUT Y3 2
8 VCC
7 OUT Y1
IN A2 3
6 IN A3
GND 4
5 OUT Y2
Figure 1. Pinout
http://onsemi.com
8
1
US8
US SUFFIX
CASE 493
MARKING
DIAGRAM
8
LX M G
G
1
LX
= Device Code
M
= Date Code*
G
= PbâFree Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon
manufacturing location.
PIN ASSIGNMENT
1
IN A1
2
OUT Y3
3
IN A2
4
GND
5
OUT Y2
6
IN A3
7
OUT Y1
8
VCC
FUNCTION TABLE
A Input
Y Output
L
L
H
H
IN A1
1
IN A2
1
IN A3
1
OUT Y1
OUT Y2
OUT Y3
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2006
1
April, 2006 â Rev. 5
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
NL37WZ17/D
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