NL17SZ74 Datasheet, PDF (1/12 Pages) ON Semiconductor – Single D Flip Flop

NL17SZ74
Single D Flip Flop
The NL17SZ74 is a high performance, full function Edge triggered
D Flip Flop, with all the features of a standard logic device such as the
74LCX74.
• Extremely High Speed: t_PD 2.6 ns (typical) at V_CC = 5 V
• Designed for 1.65 V to 5.5 V V_CC Operation
• 5 V Tolerant Inputs – Interface Capability with 5 V TTL Logic
• LVTTL Compatible
• LVCMOS Compatible
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current (10 µA) Substantially Reduces
System Power Requirements
• Replacement for NC7SZ74
• Tiny Ultra Small Package Only 2.1 X 3.0 mm
• High ESD Ratings: 2000 V Human Body Model
High ESD Ratings: 200 V Machine Model
• Chip Complexity: FET = 64
http://onsemi.com
PR
7
D
2
5
Q
CP
1
3
Q
6
CLR
V_CC = 8, GND = 4
Figure 1. Logic Diagram
TRUTH TABLE
Inputs
Outputs
PR CLR CP D Q Q
L HX XHL
H L X X LH
L
L
X
X
HH
H
H
↑
h
H
L
HH↑
l
LH
H
H
↑
X NC NC
Operating Mode
Asynchronous Set
Asynchronous Clear
Undetermined
Load and Read Register
Hold
H = High Voltage Level
h = High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition
L = Low Voltage Level
l = Low Voltage Level One Setup Time Prior to the Low–to–High Clock Transition
NC = No Change
X = High or Low Voltage Level and Transitions are Acceptable
↑ = Low–to–High Transition
↑ = Not a Low–to–High Transition
For I_CC reasons, DO NOT FLOAT Inputs
US8
CASE 493
US SUFFIX
MARKING DIAGRAM
MH ^D
MH = Specific Device Code
D _{= Date Code}
PINOUT
CP
D
Q
GND
18
2
7
3
6
4
5
V_CC
PR
CLR
Q
ORDERING INFORMATION
Device
Package
Shipping
NL17SZ74US
US8
3000/Tape & Reel
© Semiconductor Components Industries, LLC, 2002
1
May, 2002 – Rev. 2
Publication Order Number:
NL17SZ74/D