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NL17SH17 Datasheet, PDF (1/5 Pages) ON Semiconductor – Single Schmitt-Trigger Inverter
NL17SH17
Single Schmitt-Trigger
Buffer
The NL17SH17 is a single gate CMOS Schmitt−trigger
non−inverting buffer fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
NL17SH17 input structure provides protection when voltages up to 7
V are applied, regardless of the supply voltage. This allows the
NL17SH17 to be used to interface 5 V circuits to 3 V circuits.
The NL17SH17 can be used to enhance noise immunity or to square
up slowly changing waveforms.
Features
• High Speed: tPD = 4.0 ns (Typ) at VCC = 5.0 V
• Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 101
• These Devices are Pb−Free and are RoHS Compliant
IN A 1
5 VCC
http://onsemi.com
MARKING
DIAGRAM
SOT−953
CASE 527AE
M
1
Y = Specific Device Code
(Rotated 90°)
M = Month Code
PIN ASSIGNMENT
1
IN A
2
GND
3
NC
4
OUT Y
5
VCC
GND 2
NC 3
4 OUT Y
Figure 1. Pinout
IN A
1
OUT Y
Figure 2. Logic Symbol
FUNCTION TABLE
Input A
Output Y
L
L
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
September, 2012 − Rev. 0
Publication Order Number:
NL17SH17/D