NL17SH126 Datasheet, PDF (1/5 Pages) ON Semiconductor – Noninverting 3-State Buffer

NL17SH126
Noninverting 3-State Buffer
The NL17SH126 is an advanced high speed CMOS noninverting
3−state buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffered
3−state output which provides high noise immunity and stable output.
The NL17SH126 input structure provides protection when voltages
up to 7 V are applied, regardless of the supply voltage. This allows the
NL17SH126 to be used to interface 5 V circuits to 3 V circuits.
Features
• High Speed: t_PD = 3.5 ns (Typ) at V_CC = 5 V
• Low Power Dissipation: I_CC = 1 mA (Max) at T_A = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• These are Pb−Free Devices
IN A 1
GND 2
OE 3
5 V_CC
4 OUT Y
Figure 1. Pinout (Top View)
OE
EN
IN A
OUT Y
Figure 2. Logic Symbol
http://onsemi.com
MARKING
DIAGRAM
SOT−953
CASE 527AE
JM
1
J = Specific Device Code
M = Month Code
PIN ASSIGNMENT
1
IN A
2
GND
3
OE
4
OUT Y
5
V_CC
A Input
L
H
X
FUNCTION TABLE
OE Input
Y Output
H
L
H
H
L
Z
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
August, 2011 − Rev. 1
Publication Order Number:
NL17SH126/D